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t
PHL
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2V to 6V
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 574
IMPROVED LATCH-UP IMMUNITY
DIP
PACKAGE
DIP
SOP
TSSOP
SOP
ORDER CODES
T UBE
M74AC574B
M74AC574M
TSSOP
T& R
M74AC574MTR
M74AC574TTR
DESCRIPTION
The AC574 is an advanced high-speed CMOS
OCTAL D-TYPE FLIP FLOP with 3 STATE
OUTPUT NON INVERTING fabricated with
sub-micron silicon gate and double-layer metal
wiring C
2
MOS technology.
These 8 bit D-Type flip-flops are controlled by a
clock input (CK) and an output enable input (OE).
On the positive transition of the clock, the Q
PIN CONNECTION AND IEC LOGIC SYMBOLS
outputs will be set to logic state that were setup
at the D inputs.
While the (OE) input is low, the 8 outputs will be
in a normal logic state (high or low logic level)
and while high level the outputs will be in a high
impedance state.
The output control does not affect the internal
operation of flip flop; that is, the old data can be
retained or the new data can be entered even
while the outputs are off.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
February 2000
1/11