74AC573 鈥?74ACT573 Octal Latch with 3-STATE Outputs
November 1988
Revised October 1999
74AC573 鈥?74ACT573
Octal Latch with 3-STATE Outputs
General Description
The 74AC573 and 74ACT573 are high-speed octal latches
with buffered common Latch Enable (LE) and buffered
common Output Enable (OE) inputs.
The 74AC573 and 74ACT573 are functionally identical to
the 74AC373 and 74ACT373 but with inputs and outputs
on opposite sides.
Features
s
I
CC
and I
OZ
reduced by 50%
s
Inputs and outputs on opposite sides of package allow-
ing easy interface with microprocessors
s
Useful as input or output port for microprocessors
s
Functionally identical to 74AC373 and 74ACT373
s
3-STATE outputs for bus interfacing
s
Outputs source/sink 24 mA
s
74ACT573 has TTL-compatible inputs
Ordering Code:
Order Number
74AC573SC
74AC573SJ
74AC573MTC
74AC573PC
74ACT573SC
74ACT573SJ
74ACT573MTC
74ACT573PC
Package Number
M20B
M20D
MTC20
N20A
M20B
M20D
MTC20
N20A
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS--013, 0.300鈥?Wide Body
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300鈥?Wide
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS--013, 0.300鈥?Wide Body
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300鈥?Wide
Device also available in Tape and Reel. Specify by appending suffix letter 鈥淴鈥?to the ordering code.
Logic Symbols
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names
D
0
鈥揇
7
LE
OE
O
0
鈥揙
7
Description
Data Inputs
Latch Enable Input
3-STATE Output Enable Input
3-STATE Latch Outputs
FACT鈩?is a trademark of Fairchild Semiconductor Corporation.
漏 1999 Fairchild Semiconductor Corporation
DS009973
www.fairchildsemi.com