54AC 74AC378 Parallel D Register with Enable
March 1993
54AC 74AC378
Parallel D Register with Enable
General Description
The 鈥橝C378 is a 6-bit register with a buffered common En-
able This device is similar to the 鈥橝C174 but with common
Enable rather than common Master Reset
Features
Y
Y
Y
Y
Y
6-bit high-speed parallel register
Positive edge-triggered D-type inputs
Fully buffered common clock and enable inputs
Input clamp diodes limit high-speed termination effects
Standard Military Drawing (SMD)
鈥橝C378 5962-91605
Logic Symbols
Connection Diagrams
Pin Assignment for
DIP SOIC and Flatpak
Pin Assignment
for LCC
TL F 10231鈥?
TL F 10231 鈥?3
IEEE IEC
TL F 10231 鈥?2
TL F 10231鈥?
Pin Names
E
D
0
鈥揇
5
CP
Q
0
鈥換
5
Description
Enable Input (Active LOW)
Data Inputs
Clock Pulse Input (Active Rising Edge)
Outputs
FACT
TM
is a trademark of National Semiconductor Corporation
C
1995 National Semiconductor Corporation
TL F 10231
RRD-B30M75 Printed in U S A