74AC175 鈥?74ACT175 Quad D-Type Flip-Flop
November 1988
Revised November 1999
74AC175 鈥?74ACT175
Quad D-Type Flip-Flop
General Description
The AC/ACT175 is a high-speed quad D-type flip-flop. The
device is useful for general flip-flop requirements where
clock and clear inputs are common. The information on the
D-type inputs is stored during the LOW-to-HIGH clock tran-
sition. Both true and complemented outputs of each flip-
flop are provided. A Master Reset input resets all flip-flops,
independent of the Clock or D-type inputs, when LOW.
Features
s
I
CC
reduced by 50%
s
Edge-triggered D-type inputs
s
Buffered positive edge-triggered clock
s
Asynchronous common reset
s
True and complement output
s
Outputs source/sink 24 mA
s
ACT175 has TTL-compatible inputs
Ordering Code:
Order Number
74AC175SC
74AC175SJ
74AC175MTC
74AC175PC
74ACT175SC
74ACT175SJ
74ACT175MTC
74ACT175PC
Package Number
M16A
M16D
MTC16
N16E
M16A
M16D
MTC16
N16E
Package Description
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150鈥?Narrow Body
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300鈥?Wide
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150鈥?Narrow Body
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300鈥?Wide
Device also available in Tape and Reel. Specify by appending suffix letter 鈥淴鈥?to the ordering code.
Logic Symbols
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names
D
0
鈥揇
3
CP
MR
Q
0
鈥換
3
Q
0
鈥換
3
Description
Data Inputs
Clock Pulse Input
Master Reset Input
True Outputs
Complement Outputs
FACT錚?is a trademark of Fairchild Semiconductor Corporation.
漏 1999 Fairchild Semiconductor Corporation
DS009936
www.fairchildsemi.com