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74AC16245TTR Datasheet

  • 74AC16245TTR

  • BUS TRANSCEIVER|DUAL|8-BIT|AC-CMOS|TSSOP|48PIN|PLASTIC

  • 8頁(yè)

  • ETC

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74AC16245
16-BIT BUS TRANSCEIVER
WITH 3-STATE OUTPUTS (NON INVERTED)
s
s
s
s
s
s
s
s
s
HIGH SPEED:
t
PD
= 4.5 ns (TYP.) at V
CC
= 5V
LOW POWER DISSIPATION:
I
CC
= 4
碌A(chǔ)
(MAX.) at T
A
=25擄C
HIGH NOISE IMMUNITY:
V
NIH
= V
NIL
= 28% V
CC
(MIN.)
POWER DOWN PROTECTION ON INPUTS
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 24 mA (MIN)
BALANCED PROPAGATION DELAYS:
t
PLH
鈮?/div>
t
PHL
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2V to 6V
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 16245
IMPROVED LATCH-UP IMMUNITY
TSSOP
ORDER CODES
PACKAGE
TSSOP
TUBE
T &R
74AC16245TTR
PIN CONNECTION
DESCRIPTION
The 74AC16245 is an advanced high-speed
CMOS 16-BIT BUS TRANSCEIVER (3-STATE)
fabricated with sub-micron silicon gate and dou-
ble-layer metal wiring C
2
MOS tecnology.
This IC is intended for two-way asynchronous
communication between data busses; the
direction of data transmission is determined by
DIR input. The enable input G can be used to
disable the device so that the busses are
effectively isolated.
All inputs and outputs are equipped with protec-
tion circuits against static discharge, giving them
2KV ESD immunity and transient excess voltage.
All floating bus terminals during High Z State must
be held HIGH or LOW.
April 2002
1/8

74AC16245TTR 產(chǎn)品屬性

  • 1

  • 集成電路 (IC)

  • 邏輯 - 緩沖器，驅(qū)動(dòng)器，接收器，收發(fā)器

  • 74AC

  • 收發(fā)器，非反相

  • 2

  • 8

  • 24mA，24mA

  • 2 V ~ 6 V

  • -55°C ~ 125°C

  • 表面貼裝

  • 48-TFSOP（0.240"，6.10mm 寬）

  • 48-TSSOP

  • Digi-Reel®

  • 497-1021-6

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