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74AC11011 Datasheet

  • 74AC11011

  • TRIPLE 3-INPUT POSITIVE-AND GATES

  • 5頁(yè)

  • TI

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54AC11011, 74AC11011
TRIPLE 3-INPUT POSITIVE-AND GATES
SCAS029A 鈥?JULY 1987 鈥?REVISED APRIL 1993
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Flow-Through Architecture Optimizes
PCB Layout
Center-Pin V
CC
and GND Configuration
Minimizes High-Speed Switching Noise
EPIC
鈩?/div>
(Enhanced-Performance Implanted
CMOS) 1-碌m Process
500-mA Typical Latch-Up Immunity
at 125擄C
Package Options Include Plastic
Small-Outline Packages, Ceramic Chip
Carriers, and Standard Plastic and Ceramic
300-mil DIPs
54AC11011 . . . J PACKAGE
74AC11011 . . . D OR N PACKAGE
(TOP VIEW)
1A
1Y
2Y
GND
GND
3Y
3C
3B
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1B
1C
2A
V
CC
V
CC
2B
2C
3A
description
These devices contain three independent 3-input
AND gates. They perform the Boolean functions
Y = A
S
B
S
C or Y = A + B + C in positive logic.
The 54AC11011 is characterized for operation
over the full military temperature range of 鈥?55擄C
to 125擄C. The 74AC11011 is characterized for
operation from 鈥?40擄C to 85擄C.
54AC11011 . . . FK PACKAGE
(TOP VIEW)
1C
1B
NC
1A
1Y
4
5
6
7
8
3 2 1 20 19
18
17
16
15
14
9 10 11 12 13
2A
V
CC
NC
V
CC
2B
2C
3A
NC
3B
3C
NC 鈥?No internal connection
C
H
X
X
L
OUTPUT
Y
H
L
L
L
Copyright
漏
1993, Texas Instruments Incorporated
FUNCTION TABLE
(each gate)
INPUTS
A
H
L
X
X
B
H
X
L
X
EPIC is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
鈥?/div>
DALLAS, TEXAS 75265
2Y
GND
NC
GND
3Y
2鈥?

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