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t
PHL
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2V to 6V
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 00
IMPROVED LATCH-UP IMMUNITY
DIP
SOP
TSSOP
ORDER CODES
PACKAGE
DIP
SOP
TSSOP
TUBE
74AC00B
74AC00M
T&R
74AC00MTR
74AC00TTR
DESCRIPTION
The 74AC00 is an advanced high-speed CMOS
QUAD 2-INPUT NAND GATE fabricated with
sub-micron silicon gate and double-layer metal
wiring C
2
MOS tecnology.
The internal circuit is composed of 3 stages in-
cluding buffer output, which enables high noise
immunity and stable output.
All inputs and outputs are equipped with protec-
tion circuits against static discharge, giving them
2KV ESD immunity and transient excess voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
April 2001
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