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74ABT2953PWDH Datasheet

  • 74ABT2953PWDH

  • Octal registered transceiver, inverting 3-State

  • 6頁

  • PHILIPS

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Philips Semiconductors
Product specification
Octal registered transceiver, inverting (3-State)
74ABT2953
FEATURES
鈥?/div>
8-bit registered transceiver
鈥?/div>
Independent registers for A and B buses
鈥?/div>
Output capability: +64mA/鈥?2mA
鈥?/div>
Latch-up protection exceeds 500mA per Jedec Std 17
鈥?/div>
ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model
DESCRIPTION
The 74ABT2953 high-performance BiCMOS device combines low
static and dynamic power dissipation with high speed and high
output drive.
The 74ABT2953 device is an 8-bit registered inverting transceiver.
Two 8-bit back-to-back registers store data flowing in both directions
between two bidirectional buses. Data applied to the inputs is
entered and stored on the rising edge of the Clock (CPXX) provided
that the Clock Enable (CEXX) is Low. The data is then present at
the 3-State output buffers, but is only accessible when the Output
Enable (OEXX) is Low. Data flow from A inputs to B outputs is the
same as for B inputs to A outputs.
鈥?/div>
Live insertion/extraction permitted
鈥?/div>
Power-up 3-State
鈥?/div>
Power-up reset
QUICK REFERENCE DATA
SYMBOL
t
PLH
t
PHL
C
IN
C
I/O
I
CCZ
PARAMETER
Propagation delay
CPBA to An or CPAB to Bn
Input capacitance
I/O capacitance
Total supply current
CONDITIONS
T
amb
= 25擄C; GND = 0V
C
L
= 50pF; V
CC
= 5V
V
I
= 0V or V
CC
Outputs disabled;
V
O
= 0V or V
CC
Outputs disabled; V
CC
=5.5V
TYPICAL
5.0
4
7
500
UNIT
ns
pF
pF
nA
ORDERING INFORMATION
PACKAGES
24-Pin Plastic DIP
24-Pin plastic SO
24-Pin Plastic SSOP Type II
24-Pin Plastic TSSOP Type I
TEMPERATURE RANGE
鈥?0擄C to +85擄C
鈥?0擄C to +85擄C
鈥?0擄C to +85擄C
鈥?0擄C to +85擄C
OUTSIDE NORTH AMERICA
74ABT9253 N
74ABT2953 D
74ABT2953 DB
74ABT2953 PW
NORTH AMERICA
74ABT2953 N
74ABT2953 D
74ABT2953 DB
74ABT2953PW DH
DWG NUMBER
SOT222-1
SOT137-1
SOT340-1
SOT355-1
PIN CONFIGURATION
PIN DESCRIPTION
PIN NUMBER
SYMBOL
CPAB /
CPBA
CEAB /
CEBA
A0 鈥?A7
B0 鈥?B7
OEAB /
OEBA
GND
V
CC
NAME AND FUNCTION
Clock input A to B / Clock input
B to A
Clock enable input A to B / Clock
enable input B to A
Data inputs/outputs (A side)
Data outputs/outputs (B side)
Output enable inputs
Ground (0V)
Positive supply voltage
B7
B6
B5
B4
B3
B2
B1
B0
OEAB
1
2
3
4
5
6
7
8
9
24
23
22
21
20
19
18
17
16
15
14
13
TOP VIEW
V
CC
A7
A6
A5
A4
A3
A2
A1
A0
OEBA
CPBA
CEBA
10, 14
11, 13
16, 17, 18, 19,
20, 21, 22, 23
1, 2, 3, 4, 5, 6,
7, 8
9, 15
12
24
CPAB 10
CEAB 11
GND 12
SA00305
1995 Sep 06
1
853-1555 15702

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