74ABT16952 16-Bit Registered Transceiver with 3-STATE Outputs
November 1993
Revised January 1999
74ABT16952
16-Bit Registered Transceiver with 3-STATE Outputs
General Description
The ABT16952 is a 16-bit registered transceiver. Two 8-bit
back to back registers store data flowing in both directions
between two bidirectional buses. Separate clock, clock
enable and 3-STATE output enable signals are provided for
each register. The output pins are guaranteed to source 32
mA and to sink 64 mA.
Features
s
Separate clock, clock enable and 3-STATE output
enable provided for each register
s
A and B output sink capability of 64 mA source capability
of 32 mA
s
Guaranteed latchup protection
s
High impedance glitch free bus loading during entire
power up and power down cycle
s
Nondestructive hot insertion capability
Ordering Code:
Order Number
74ABT16952CSSC
74ABT16952CMTD
Package Number
MS56A
MTD56
Package Description
56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300鈥?Wide
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Devices also available in Tape and Reel. Specify by appending the letter suffix 鈥淴鈥?to the ordering code.
Pin Descriptions
Pin Names
A
0
鈥揂
15
B
0
鈥揃
15
CPAB
n
, CPBA
n
CEA
n
, CEB
n
OEAB
n
, OEBA
n
Description
Data Register A Inputs/
B-Register 3-STATE Outputs
Data Register B Inputs/
A-Register 3-STATE Outputs
Clock Pulse Inputs
Clock Enable
Output Enable Inputs
Connection Diagram
Pin Assignment for SSOP
Output Control
OE
H
L
L
Internal
Q
X
L
H
Output
Z
L
H
Function
Disable Outputs
Enable Outputs
Register Function Table
(Applies to A or B Register)
Inputs
D
X
L
H
CP
CE
H
L
L
Internal
Q
NC
L
H
Function
Hold Data
Load Data
X
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
X
=
Immaterial
Z
=
HIGH Impedance
=
LOW-to-HIGH Transition
NC
=
No Change
漏 1999 Fairchild Semiconductor Corporation
DS011647.prf
www.fairchildsemi.com