74ABT16543 16-Bit Registered Transceiver with 3-STATE Outputs
October 1993
Revised January 1999
74ABT16543
16-Bit Registered Transceiver with 3-STATE Outputs
General Description
The ABT16543 16-bit transceiver contains two sets of D-
type latches for temporary storage of data flowing in either
direction. Separate Latch Enable and Output Enable inputs
are provided for each register to permit independent con-
trol of inputting and outputting in either direction of data
flow. Each byte has separate control inputs, which can be
shorted together for full 16-bit operation.
Features
s
Back-to-back registers for storage
s
Bidirectional data path
s
A and B outputs have current sourcing capability of 32
mA and current sinking capability of 64 mA
s
Separate control logic for each byte
s
16-bit version of the ABT543
s
Separate controls for data flow in each direction
s
Guaranteed latchup protection
s
High impedance glitch free bus loading during entire
power up and power down cycle
s
Nondestructive hot insertion capability
Ordering Code:
Order Number
74ABT16543CSSC
74ABT16543CMTD
Package Number
MS56A
MTD56
Package Description
56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300鈥?Wide
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Devices also available on Tape and Reel. Specify by appending the suffix letter 鈥淴鈥?to the ordering code.
Connection Diagram
Pin Assignment for SSOP and TSSOP
Pin Descriptions
Pin Names
OEAB
n
OEBA
n
CEAB
n
CEBA
n
LEAB
n
LEBA
n
A
0
鈥揂
15
Description
A-to-B Output Enable Input (Active LOW)
B-to-A Output Enable Input (Active LOW)
A-to-B Enable Input (Active LOW)
B-to-A Enable Input (Active LOW)
A-to-B Latch Enable Input (Active LOW)
B-to-A Latch Enable Input (Active LOW)
A-to-B Data Inputs or
B-to-A 3-STATE Outputs
B
0
鈥揃
15
B-to-A Data Inputs or
A-to-B 3-STATE Outputs
漏 1999 Fairchild Semiconductor Corporation
DS011646.prf
www.fairchildsemi.com