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74ABT16374CMTDX Datasheet

  • 74ABT16374CMTDX

  • 16-Bit D-Type Flip-Flop with 3-STATE Outputs

  • 89.47KB

  • 6頁(yè)

  • FAIRCHILD

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74ABT16374 16-Bit D-Type Flip-Flop with 3-STATE Outputs
March 1994
Revised May 2005
74ABT16374
16-Bit D-Type Flip-Flop with 3-STATE Outputs
General Description
The ABT16374 contains sixteen non-inverting D-type flip-
flops with 3-STATE outputs and is intended for bus oriented
applications. The device is byte controlled. A buffered clock
(CP) and Output Enable (OE) are common to each byte
and can be shorted together for full 16-bit operation.
Features
s
Separate control logic for each byte
s
16-bit version of the ABT374
s
Edge-triggered D-type inputs
s
Buffered Positive edge-triggered clock
s
High impedance glitch free bus loading during entire
power up and power down cycle
s
Non-destructive hot insertion capability
s
Guaranteed latch-up protection
Ordering Code:
Order Number
74ABT16374CSSC
74ABT16374CMTD
Package Number
MS48A
MTD48
Package Description
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Devices also available in Tape and Reel. Specify by appending suffix letter 鈥淴鈥?to the ordering code.
Logic Symbol
Connection Diagram
Pin Descriptions
Pin Name
OE
n
CP
n
D
0
鈥揇
15
O
0
鈥揙
15
Description
3-STATE Output Enable Input (Active LOW)
Clock Pulse Input (Active Rising Edge)
Data Inputs
3-STATE Outputs
漏 2005 Fairchild Semiconductor Corporation
DS011668
www.fairchildsemi.com

74ABT16374CMTDX 產(chǎn)品屬性

  • 1,000

  • 集成電路 (IC)

  • 邏輯 - 觸發(fā)器

  • 74ABT

  • 標(biāo)準(zhǔn)

  • D 型總線

  • 三態(tài)非反相

  • 2

  • 8

  • 150MHz

  • 6.2ns

  • 正邊沿

  • 32mA，64mA

  • 4.5 V ~ 5.5 V

  • -40°C ~ 85°C

  • 表面貼裝

  • 48-TFSOP（0.240"，6.10mm 寬）

  • 帶卷 (TR)

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