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74ABT162827ADGGRE4 Datasheet

  • 74ABT162827ADGGRE4

  • 20-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

  • 11頁(yè)

  • TI

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SN54ABT162827A, SN74ABT162827A
20 BIT BUFFERS/DRIVERS
WITH 3 STATE OUTPUTS
SCBS248F 鈭?JULY 1993 鈭?REVISED JUNE 2004
Widebus
錚?/div>
Family
D
Output Ports Have Equivalent 25-鈩?Series
Resistors, So No External Resistors Are
Required
D
High-Impedance State During Power Up
and Power Down
D
Typical V
OLP
(Output Ground Bounce)
<1 V at V
CC
= 5 V, T
A
= 25擄C
D
Distributed V
CC
and GND Pins Minimize
High-Speed Switching Noise
D
I
off
and Power-Up 3-State Support Hot
Insertion
D
Flow-Through Architecture Optimizes PCB
Layout
D
Latch-Up Performance Exceeds 500 mA Per
JEDEC Standard JESD-17
D
ESD Protection Exceeds JESD 22
鈭?2000-V Human-Body Model (A114-A)
鈭?200-V Machine Model (A115-A)
D
Members of the Texas Instruments
SN54ABT162827A . . . WD PACKAGE
SN74ABT162827A . . . DGG OR DL PACKAGE
(TOP VIEW)
description/ordering information
The 鈥橝BT162827A devices are noninverting
20-bit buffers composed of two 10-bit buffers with
separate output-enable signals. For either 10-bit
buffer, the two output-enable (1OE1 and 1OE2, or
2OE1 and 2OE2) inputs must both be low for the
corresponding Y outputs to be active. If either
output-enable input is high, the outputs of that
10-bit buffer are in the high-impedance state.
The outputs, which are designed to source or sink
up to 12 mA, include equivalent 25-鈩?series
resistors to reduce overshoot and undershoot.
ORDERING INFORMATION
TA
PACKAGE鈥?/div>
Tube
鈭?0 C 85擄C
鈭?0擄C to 85 C
鈭?5擄C to 125擄C
SSOP 鈭?DL
TSSOP 鈭?DGG
CFP 鈭?WD
Tape and reel
Tape and reel
Tube
ORDERABLE
PART NUMBER
SN74ABT162827ADL
1OE1
1Y1
1Y2
GND
1Y3
1Y4
V
CC
1Y5
1Y6
1Y7
GND
1Y8
1Y9
1Y10
2Y1
2Y2
2Y3
GND
2Y4
2Y5
2Y6
V
CC
2Y7
2Y8
GND
2Y9
2Y10
2OE1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
1OE2
1A1
1A2
GND
1A3
1A4
V
CC
1A5
1A6
1A7
GND
1A8
1A9
1A10
2A1
2A2
2A3
GND
2A4
2A5
2A6
V
CC
2A7
2A8
GND
2A9
2A10
2OE2
TOP-SIDE
MARKING
ABT162827A
ABT162827A
SNJ54ABT162827AWD
SN74ABT162827ADLR
SN74ABT162827ADGGR
SNJ54ABT162827AWD
鈥?Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments.
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
POST OFFICE BOX 655303
Copyright
錚?/div>
2004, Texas Instruments Incorporated
鈥?/div>
DALLAS, TEXAS 75265
1

74ABT162827ADGGRE4 產(chǎn)品屬性

  • 2,000

  • 集成電路 (IC)

  • 邏輯 - 緩沖器，驅(qū)動(dòng)器，接收器，收發(fā)器

  • 74ABT

  • 緩沖器/線路驅(qū)動(dòng)器，非反相

  • 2

  • 10

  • 12mA，12mA

  • 4.5 V ~ 5.5 V

  • -40°C ~ 85°C

  • 表面貼裝

  • 56-TFSOP（0.240"，6.10mm 寬）

  • 56-TSSOP

  • 帶卷 (TR)

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