74ABT126 Quad Buffer with 3-STATE Outputs
January 1995
Revised November 1999
74ABT126
Quad Buffer with 3-STATE Outputs
General Description
The ABT126 contains four independent non-inverting buff-
ers with 3-STATE outputs.
Features
s
Non-inverting buffers
s
Output sink capability of 64 mA, source capability of
32 m
s
Guaranteed latchup protection
s
High impedance glitch free bus loading during entire
power up and power down cycle
s
Nondestructive hot insertion capability
s
Disable time less than enable time to avoid bus
contention
Ordering Code:
Order Number
74ABT126CSC
74ABT126CSJ
74ABT126CMTC
Package Number
M14A
M14D
MTC14
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150鈥?Narrow Body
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending suffix letter 鈥淴鈥?to the ordering code.
Connection Diagram
Pin Descriptions
Pin Names
A
n
, B
n
O
n
Descriptions
Inputs
Outputs
Function Table
Inputs
A
n
H
H
L
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
Z
=
HIGH Impedance
X
=
Immaterial
Output
B
n
L
H
X
O
n
L
H
Z
漏 1999 Fairchild Semiconductor Corporation
DS011692
www.fairchildsemi.com