音影先锋亚洲天堂网|电影世界尽头的爱完整版播放|国产 熟女 91|高清无码免费观看欧美日韩|韩国一区二区三区黄色录像|美女亚洲加勒比在线|亚洲综合网 开心五月|7x成人在线入口|成人网站免费日韩毛片区|国产黄片?一级?二级?三级

6B273 Datasheet

  • 6B273

  • 8-BIT LATCHED DMOS POWER DRIVER

  • 12頁(yè)

  • ALLEGRO   ALLEGRO

掃碼查看芯片數(shù)據(jù)手冊(cè)

上傳產(chǎn)品規(guī)格書(shū)

PDF預(yù)覽

6B273
ADVANCE INFORMATION
(Subject to change without notice)
January 24, 2000
8-BIT LATCHED
DMOS POWER DRIVER
The A6B273KA and A6B273KLW combine eight (positive-edge-
triggered D-type) data latches and DMOS outputs for systems requiring
relatively high load power. Driver applications include relays, sole-
noids, and other medium-current or high-voltage peripheral power
loads. The CMOS inputs and latches allow direct interfacing with
microprocessor-based systems. Use with TTL may require appropriate
pull-up resistors to ensure an input logic high.
The DMOS output inverts the DATA input. All of the output
drivers are disabled (the DMOS sink drivers turned OFF) with the
CLEAR input low. The A6B273KA/KLW DMOS open-drain outputs
are capable of sinking up to 500 mA. Similar devices with reduced
r
DS(on)
are available as the A6273KA/KLW.
The A6B273KA is furnished in a 20-pin dual in-line plastic
package. The A6B273KLW is furnished in a 20-lead wide-body,
small-outline plastic package (SOIC) with gull-wing leads for surface-
mount applications. Copper lead frames, reduced supply current
requirements, and low on-state resistance allow both devices to sink
150 mA from all outputs continuously, to ambient temperatures over
85擄C.
Data Sheet
26180.122
CLEAR
IN
1
IN
2
OUT
1
OUT
2
OUT
3
OUT
4
IN
3
IN
4
GROUND
1
2
3
4
V
DD
20
19
18
17
LOGIC
SUPPLY
IN
8
IN
7
OUT
8
OUT
7
OUT
6
OUT
5
IN
6
IN
5
STROBE
LATCHES
LATCHES
5
6
7
8
9
10
16
15
14
13
12
11
Dwg. PP-015-2
Note that the A6B273KA (DIP) and the A6B273KLW
(SOIC) are electrically identical and share a common
terminal number assignment.
ABSOLUTE MAXIMUM RATINGS
at T
A
= 25
C
Output Voltage, V
O
...............................
50 V
Output Drain Current,
Continuous, I
O
..........................
150 mA*
Peak, I
OM
...................................
500 mA鈥?/div>
Single-Pulse Avalanche Energy,
E
AS
.................................................
30 mJ
Logic Supply Voltage, V
DD
..................
7.0 V
Input Voltage Range,
V
I
...................................
-0.3 V to +7.0 V
Package Power Dissipation,
P
D
...........................................
See Graph
Operating Temperature Range,
T
A
.................................
-40
C to +125
C
Storage Temperature Range,
T
S
.................................
-55
C to +150
C
* Each output, all outputs on.
鈥?Pulse duration
鈮?/div>
100
碌s,
duty cycle
鈮?/div>
2%.
Caution: These CMOS devices have input static
protection (Class 3) but are still susceptible to damage if
exposed to extremely high static electrical charges.
FEATURES
s
50 V Minimum Output Clamp Voltage
s
150 mA Output Current (all outputs simultaneously)
s
5
鈩?/div>
Typical
r
DS(on)
s
Low Power Consumption
s
Replacements for TPIC6B273N and TPIC6B273DW
Always order by complete part number:
Part Number
Package
A6B273KA
20-pin DIP
A6B273KLW
20-lead SOIC
R
胃JA
55擄C/W
70擄C/W
R
胃JC
25擄C/W
17擄C/W

6B273相關(guān)型號(hào)PDF文件下載

  • 型號(hào)
    版本
    描述
    廠(chǎng)商
    下載
  • 英文版
    8-BIT LATCHED DMOS POWER DRIVER
    ALLEGRO
  • 英文版
    8-BIT LATCHED DMOS POWER DRIVER
    ALLEGRO [A...
  • 英文版
    8-BIT LATCHED DMOS POWER DRIVER
    ALLEGRO

您可能感興趣的PDF文件資料

掃碼下載APP,
一鍵連接廣大的電子世界。

在線(xiàn)人工客服

買(mǎi)家服務(wù):
賣(mài)家服務(wù):
技術(shù)客服:

0571-85317607

網(wǎng)站技術(shù)支持

13606545031

客服在線(xiàn)時(shí)間周一至周五
9:00-17:30

關(guān)注官方微信號(hào),
第一時(shí)間獲取資訊。

建議反饋

聯(lián)系人:

聯(lián)系方式:

按住滑塊,拖拽到最右邊
>>
感謝您向阿庫(kù)提出的寶貴意見(jiàn),您的參與是維庫(kù)提升服務(wù)的動(dòng)力!意見(jiàn)一經(jīng)采納,將有感恩紅包奉上哦!