6A259
ADVANCE INFORMATION
(Subject to change without notice)
March 22, 2000
8-BIT ADDRESSABLE
DMOS POWER DRIVER
The A6A259KA and A6A259KLB combine a 3-to-8 line CMOS
decoder and accompanying data latches, control circuitry, and DMOS
outputs in a multi-functional power driver capable of storing single-line
data in the addressable latches or use as a decoder or demuliplexer.
Driver applications include relays, solenoids, and other medium-current
or high-voltage peripheral power loads.
The CMOS inputs and latches allow direct interfacing with micro-
processor-based systems. Use with TTL may require appropriate pull-
up resistors to ensure an input logic high. Four modes of operation are
selectable with the CLEAR and ENABLE inputs.
The addressed DMOS output inverts the DATA input with all
unaddressed outputs remaining in their previous states. All of the output
drivers are disabled (the DMOS sink drivers turned off) with the
CLEAR input low and the ENABLE input high. The A6A259KA/KLB
DMOS open-drain outputs are capable of sinking up to 500 mA.
The A6A259KA is furnished in a 20-pin dual in-line plastic pack-
age. The A6A259KLB is furnished in a 24-lead wide-body, small-
outline plastic batwing package (SOIC) with gull-wing leads for surface-
mount applications. Copper lead frames, reduced supply current re-
quirements, and low on-state resistance allow both devices to sink 150
mA from all outputs continuously, to ambient temperatures over 85擄C.
Data Sheet
26186.121
A6A259KA (DIP)
OUT
2
OUT
3
S
1
LOGIC
GROUND
POWER
GROUND
POWER
GROUND
S
2
(MSB)
ENABLE
OUT
4
OUT
5
1
2
3
4
5
6
7
8
9
10
EN
20
19
18
V
DD
17
OUT
1
OUT
0
S
0
(LSB)
LOGIC
SUPPLY
POWER
GROUND
POWER
GROUND
CLEAR
DATA
OUT
7
OUT
6
DECODER
LATCHES
16
15
14
13
12
11
Dwg. PP-050-4
ABSOLUTE MAXIMUM RATINGS
at T
A
= 25
擄
C
Output Voltage, V
O
............................
50 V
Output Drain Current,
Continuous, I
O
......................
350 mA*
Peak, I
OM
...........................
1100 mA*鈥?/div>
Peak, I
OM
....................................
2.0 A鈥?/div>
Single-Pulse Avalanche Energy,
E
AS
.............................................
75 mJ
Logic Supply Voltage, V
DD
..............
7.0 V
Input Voltage Range,
V
I
...............................
-0.3 V to +7.0 V
Package Power Dissipation,
P
D
.......................................
See Graph
Operating Temperature Range,
T
A
.............................
-40
擄
C to +125
擄
C
Storage Temperature Range,
T
S
.............................
-55
擄
C to +150
擄
C
*Each output, all outputs on.
鈥?Pulse duration
鈮?/div>
100
碌s,
duty cycle
鈮?/div>
2%.
Caution: These CMOS devices have input static
protection (Class 3) but are still susceptible to dam-
age if exposed to extremely high static electrical
charges.
FEATURES
I
50 V Minimum Output Clamp Voltage
I
350 mA Output Current (all outputs simultaneously)
I
1
鈩?/div>
Typical
r
DS(on)
I
Internal Short-Circuit Protection
I
Low Power Consumption
I
Replacements for TPIC6A259N and TPIC6A259DW
Always order by complete part number:
Part Number
Package
R
胃JA
A6A259KA
20-pin DIP
55擄C/W
A6A259KLB 24-lead SOIC 55擄C/W
R
胃JC
25擄C/W
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英文版
8-BIT ADDRESSABLE DMOS POWER DRIVER
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英文版
8-BIT ADDRESSABLE DMOS POWER DRIVER
ALLEGRO [A...
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英文版
20 (4), 38 Position SFP+ (4), QSFP+ 4x Plug to Plug (4) 9.84...
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英文版
20 (4), 38 Position SFP+ (4), QSFP+ 4x Plug to Plug (4) 16.4...
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英文版
20 (4), 38 Position SFP+ (4), QSFP+ 4x Plug to Plug (4) 23.0...
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英文版
20 (4), 38 Position SFP+ (4), QSFP+ 4x Plug to Plug (4) 32.8...
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英文版
20 (4), 38 Position SFP+ (4), QSFP+ 4x Plug to Plug (4) 65.6...
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