ACS11MS
Data Sheet
November 1998
File Number
4543
Radiation Hardened Triple 3-Input AND
Gate
The Radiation Hardened ACS11MS is a Triple 3-Input AND
Gate. When all three inputs to one of the gates are at a
HIGH level, the corresponding Y output will be HIGH. A LOW
level on any input will cause the output for that gate to be
LOW. All inputs are buffered and the outputs are designed
for balanced propagation delay and transition times.
The ACS11MS is fabricated on a CMOS Silicon on Sapphire
(SOS) process, which provides an immunity to Single Event
Latch-up and the capability of highly reliable performance in
any radiation environment. These devices offer signi鏗乧ant
power reduction and faster performance when compared to
ALSTTL types.
Speci鏗乧ations for Rad Hard QML devices are controlled
by the Defense Supply Center in Columbus (DSCC). The
SMD numbers listed below must be used when ordering.
Detailed Electrical Speci鏗乧ations for the ACS11MS are
contained in SMD 5962-98622. A 鈥渉ot-link鈥?is provided
on our homepage with instructions for downloading.
www.intersil.com/spacedefense/newsafclasst.asp
Features
鈥?QML Quali鏗乪d Per MIL-PRF-38535 Requirements
鈥?1.25 Micron Radiation Hardened SOS CMOS
鈥?Radiation Environment
- Latch-Up Free Under any Conditions
- Total Dose. . . . . . . . . . . . . . . . . . . . . . 3 x 10
5
RAD (Si)
- SEU Immunity . . . . . . . . . . . . . <1 x 10
-10
Errors/Bit/Day
- SEU LET Threshold . . . . . . . . . . . . >100MeV/(mg/cm
2
)
鈥?Input Logic Levels . . . . V
IL
= (0.3)(V
CC
), V
IH
= (0.7)(V
CC
)
鈥?Output Current . . . . . . . . . . . . . . . . . . . . . . . .
鹵8mA
(Min)
鈥?Quiescent Supply Current . . . . . . . . . . . . . . 100碌A (Max)
鈥?Propagation Delay . . . . . . . . . . . . . . . . . . . . . . 12ns (Max)
Applications
鈥?High Speed Control Circuits
鈥?Sensor Monitoring
鈥?Low Power Designs
Ordering Information
ORDERING NUMBER
5962F9862201VCC
ACS11D/SAMPLE-03
5962F9862201VXC
ACS11K/SAMPLE-03
5962F9862201V9A
INTERNAL MKT. NUMBER
ACS11DMSR-03
ACS11D/SAMPLE-03
ACS11KMSR-03
ACS11K/SAMPLE-03
ACS11HMSR-03
TEMP. RANGE (
o
C)
-55 to 125
25
-55 to 125
25
25
PACKAGE
14 Ld SBDIP
14 Ld SBDIP
14 Ld Flatpack
14 Ld Flatpack
Die
DESIGNATOR
CDIP2-T14
CDIP2-T14
CDFP4-F14
CDFP4-F14
N/A
Pinouts
ACS11MS
(SBDIP)
TOP VIEW
A1
B1
A2
A2 3
B2 4
C2 5
Y2 6
GND 7
12 Y1
11 C3
10 B3
9 A3
8 Y3
B2
C2
Y2
GND
ACS11MS
(FLATPACK)
TOP VIEW
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
CC
C1
Y1
C3
B3
A3
Y3
A1 1
B1 2
14 V
CC
13 C1
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright 漏 Intersil Corporation 1999
INTERSIL
1
2
