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5962-9762201VFA Datasheet

  • 5962-9762201VFA

  • HIGH-SPEED DIFFERENTIAL LINE RECEIVERS

  • 37頁(yè)

  • TI

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SN55LVDS32, SN65LVDS32, SN65LVDS3486, SN65LVDS9637
HIGH SPEED DIFFERENTIAL LINE RECEIVERS
SLLS262N 鈭?JULY 1997 鈭?REVISED MARCH 2004
D
Meet or Exceed the Requirements of ANSI
D
D
D
D
D
D
D
D
D
TIA/EIA-644 Standard
Operate With a Single 3.3-V Supply
Designed for Signaling Rate of up to
400 Mbps
Differential Input Thresholds
鹵
100 mV Max
Typical Propagation Delay Time of 2.1 ns
Power Dissipation 60 mW Typical Per
Receiver at 200 MHz
Bus-Terminal ESD Protection Exceeds 8 kV
Low-Voltage TTL (LVTTL) Logic Output
Levels
Pin Compatible With AM26LS32, MC3486,
and
碌A(chǔ)9637
Open-Circuit Fail-Safe
SN55LVDS32 . . . J OR W
SN65LVDS32 . . . D OR PW
(Marked as
LVDS32
or
65LVDS32)
(TOP VIEW)
1B
1A
1Y
G
2Y
2A
2B
GND
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
CC
4B
4A
4Y
G
3Y
3A
3B
SN55LVDS32FK
(TOP VIEW)
VCC
3B
16
15
14
13
12
11
10
9
8
7
6
5
NC
1
1A
1B
description
The
SN55LVDS32,
SN65LVDS32,
SN65LVDS3486, and SN65LVDS9637 are
differential line receivers that implement the
electrical characteristics of low-voltage differential
signaling (LVDS). This signaling technique lowers
the output voltage levels of 5-V differential
standard levels (such as EIA/TIA-422B) to reduce
the power, increase the switching speeds, and
allow operation with a 3.3-V supply rail. Any of the
four differential receivers provides a valid logical
output state with a
鹵100-mV
differential input
voltage within the input common-mode voltage
range. The input common-mode voltage range
allows 1 V of ground potential difference between
two LVDS nodes.
The intended application of these devices and
signaling technique is both point-to-point and
multidrop (one driver and multiple receivers) data
transmission over controlled impedance media of
approximately 100
鈩?
The transmission media
may be printed-circuit board traces, backplanes,
or cables. The ultimate rate and distance of
data transfer depends on the attenuation
characteristics of the media and the noise
coupling to the environment.
The SN65LVDS32, SN65LVDS3486, and
SN65LVDS9637 are characterized for operation
from 鈭?40擄C to 85擄C. The SN55LVDS32 is
characterized for operation from 鈭?5擄C to 125擄C.
3
2
20 19
18
4A
17
4Y
16
NC
15
G
14
3Y
1Y
G
NC
2Y
2A
4
5
6
7
8
9
10 11 12 13
2B
GND
SN65LVDS3486D
(Marked as
LVDS3486)
(TOP VIEW)
NC
1B
1A
1Y
1,2EN
2Y
2A
2B
GND
1
2
3
4
5
6
7
8
SN65LVDS9637D
(Marked as
DK637
or
LVDS37)
SN65LVDS9637DGN
(Marked as
L37)
SN65LVDS9637DGK
(Marked as
AXF)
(TOP VIEW)
V
CC
1Y
2Y
GND
1
2
3
4
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPAD is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
錚?/div>
1997 鈭?2004, Texas Instruments Incorporated
On products compliant to MIL PRF 38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
POST OFFICE BOX 655303
鈥?/div>
DALLAS, TEXAS 75265
3A
V
CC
4B
4A
4Y
3,4EN
3Y
3A
3B
1A
1B
2A
2B
4B
1

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