SN74AHC125 . . . RGY PACKAGE
SN54AHC125 . . . FK PACKAGE
錚?/div>
2003, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
SN54AHC125 . . . J OR W PACKAGE
SN74AHC125 . . . D, DB, DGV, N, NS,
OR PW PACKAGE
(TOP VIEW)
GND
3Y
description/ordering information
The 鈥橝HC125 devices are quadruple bus buffer gates featuring independent line drivers with 3-state outputs.
Each output is disabled when the associated output-enable (OE) input is high. When OE is low, the respective
gate passes the data from the A input to its Y output.
To ensure the high-impedance state during power up or power down, OE should be tied to V
CC
through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
ORDERING INFORMATION
TA
PACKAGE鈥?/div>
QFN 鈥?RGY
PDIP 鈥?N
SOIC 鈥?D
鈥?0擄C to 85擄C
SOP 鈥?NS
SSOP 鈥?DB
TSSOP 鈥?PW
TVSOP 鈥?DGV
CDIP 鈥?J
鈥?5擄C to 125擄C
CFP 鈥?W
LCCC 鈥?FK
Tape and reel
Tube
Tube
Tape and reel
Tape and reel
Tape and reel
Tube
Tape and reel
Tape and reel
Tube
Tube
Tube
SN74AHC125RGYR
SN74AHC125N
SN74AHC125D
SN74AHC125DR
SN74AHC125NSR
SN74AHC125DBR
SN74AHC125PW
SN74AHC125PWR
SN74AHC125DGVR
SNJ54AHC125J
SNJ54AHC125W
SNJ54AHC125FK
鈥?Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
鈥?/div>
DALLAS, TEXAS 75265
2Y
GND
NC
3Y
3A
1
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