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5962-9455501MRA Datasheet

  • 5962-9455501MRA

  • Phase Shift Resonant Controller

  • 19頁

  • TI

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application
INFO
available
UC1875/6/7/8
UC2875/6/7/8
UC3875/6/7/8
Phase Shift Resonant Controller
FEATURES
鈥?/div>
Zero to 100% Duty Cycle Control
鈥?/div>
Programmable Output Turn-On Delay
鈥?/div>
Compatible with Voltage or Current
Mode Topologies
鈥?/div>
Practical Operation at Switching
Frequencies to 1MHz
鈥?/div>
Four 2A Totem Pole Outputs
鈥?/div>
10MHz Error Amplifier
鈥?/div>
Undervoltage Lockout
鈥?/div>
Low Startup Current 鈥?50碌A(chǔ)
鈥?/div>
Outputs Active Low During UVLO
鈥?/div>
Soft-Start Control
鈥?/div>
Latched Over-Current Comparator
With Full Cycle Restart
鈥?/div>
Trimmed Reference
DESCRIPTION
The UC1875 family of integrated circuits implements control of a bridge
power stage by phase-shifting the switching of one half-bridge with respect
to the other, allowing constant frequency pulse-width modulation in combi-
nation with resonant, zero-voltage switching for high efficiency performance
at high frequencies. This family of circuits may be configured to provide
control in either voltage or current mode operation, with a separate
over-current shutdown for fast fault protection.
A programmable time delay is provided to insert a dead-time at the turn-on
of each output stage. This delay, providing time to allow the resonant
switching action, is independently controllable for each output pair (A-B,
C-D).
With the oscillator capable of operation at frequencies in excess of 2MHz,
overall switching frequencies to 1MHz are practical. In addition to the stan-
dard free running mode, with the CLOCKSYNC pin, the user may configure
these devices to accept an external clock synchronization signal, or may
lock together up to 5 units with the operational frequency determined by
the fastest device.
Protective features include an undervoltage lockout which maintains all out-
puts in an active-low state until the supply reaches a 10.75V threshold.
1.5V hysteresis is built in for reliable, boot-strapped chip supply.
Over-current protection is provided, and will latch the outputs in the OFF
state within 70nsec of a fault. The current-fault circuitry implements
full-cycle restart operation.
(continued)
BLOCK DIAGRAM
UDG-95073
SLUS229B - JULY 1999 - REVISED JUNE 2004

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