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5962-9314801QSA Datasheet

  • 5962-9314801QSA

  • OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLOCK ENABLE

  • 14頁

  • TI

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SN54ABT377, SN74ABT377
OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS
WITH CLOCK ENABLE
SCBS156B 鈥?FEBRUARY 1991 鈥?REVISED JULY 1994
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
State-of-the-Art
EPIC-
螜螜
B
鈩?/div>
BiCMOS Design
Significantly Reduces Power Dissipation
Latch-Up Performance Exceeds 500 mA
Per JEDEC Standard JESD-17
Typical V
OLP
(Output Ground Bounce)
< 1 V at V
CC
= 5 V, T
A
= 25擄C
High-Drive Outputs (鈥?32-mA I
OH
,
64-mA I
OL
)
Package Options Include Plastic
Small-Outline (DW) and Shrink
Small-Outline (DB) Packages, Ceramic
Chip Carriers (FK), and Plastic (N) and
Ceramic (J) DIPs
SN54ABT377 . . . J PACKAGE
SN74ABT377 . . . DB, DW, OR N PACKAGE
(TOP VIEW)
CLKEN
1Q
1D
2D
2Q
3Q
3D
4D
4Q
GND
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
CC
8Q
8D
7D
7Q
6Q
6D
5D
5Q
CLK
description
The
鈥睞BT377
are 8-bit positive-edge-triggered
D-type flip-flops with a clock (CLK) input. They are
particularly suitable for implementing buffer and
storage registers, shift registers, and pattern
generators.
Data (D) input information that meets the setup
time requirements is transferred to the Q outputs
on the positive-going edge of the clock pulse if the
common clock-enable (CLKEN) input is low. Clock
triggering occurs at a particular voltage level and
is not directly related to the transition time of the
positive-going pulse. When the buffered clock
(CLK) input is at either the high or low level, the
D input signal has no effect at the output. The
circuits are designed to prevent false clocking by
transitions at CLKEN.
SN54ABT377 . . . FK PACKAGE
(TOP VIEW)
1D
1Q
CLKEN
V
CC
2D
2Q
3Q
3D
4D
4
5
6
7
8
3 2 1 20 19
18
17
16
15
14
9 10 11 12 13
8Q
8D
7D
7Q
6Q
6D
The SN74ABT377 is available in TI鈥檚 shrink small-outline package (DB), which provides the same I/O pin count
and functionality of standard small-outline packages in less than half the printed-circuit-board area.
The SN54ABT377 is characterized for operation over the full military temperature range of 鈥?55擄C to 125擄C. The
SN74ABT377 is characterized for operation from 鈥?40擄C to 85擄C.
FUNCTION TABLE
(each flip-flop)
INPUTS
CLKEN
H
L
L
X
CLK
X
鈫?/div>
鈫?/div>
H or L
D
X
H
L
X
OUTPUT
Q
Q0
H
L
Q0
EPIC-螜螜B is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
鈥?/div>
DALLAS, TEXAS 75265
4Q
GND
CLK
5Q
5D
Copyright
漏
1994, Texas Instruments Incorporated
2鈥?

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