EPIC-螜螜B錚?/div>
BiCMOS Design
D
D
D
D
D
Significantly Reduces Power Dissipation
Latch-Up Performance Exceeds 500 mA Per
JEDEC Standard JESD-17
ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
Typical V
OLP
(Output Ground Bounce) < 1 V
at V
CC
= 5 V, T
A
= 25擄C
High-Drive Outputs (鈭?2-mA I
OH
, 64-mA I
OL
)
Package Options Include Plastic
Small-Outline (DW), Shrink Small-Outline
(DB), and Thin Shrink Small-Outline (PW)
Packages, Ceramic Chip Carriers (FK),
Plastic (N) and Ceramic (J) DIPs, and
Ceramic Flat (W) Package
SN54ABT244 . . . J OR W PACKAGE
SN74ABT244A . . . DB, DW, N, OR PW PACKAGE
(TOP VIEW)
1OE
1A1
2Y4
1A2
2Y3
1A3
2Y2
1A4
2Y1
GND
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
CC
2OE
1Y1
2A4
1Y2
2A3
1Y3
2A2
1Y4
2A1
SN54ABT244 . . . FK PACKAGE
(TOP VIEW)
2Y4
1A1
1OE
V
CC
description
These octal buffers and line drivers are designed
specifically to improve both the performance and
density of 3-state memory address drivers, clock
drivers, and bus-oriented receivers and
transmitters. Together with the SN54ABT240,
SN74ABT240A,
SN54ABT241,
and
SN74ABT241A, these devices provide the choice
of selected combinations of inverting and
noninverting outputs, symmetrical active-low
output-enable (OE) inputs, and complementary
OE and OE inputs.
1A2
2Y3
1A3
2Y2
1A4
4
5
6
7
8
3 2 1 20 19
18
17
16
15
14
9 10 11 12 13
2OE
1Y1
2A4
1Y2
2A3
1Y3
The SN54ABT244 and SN74ABT244A are organized as two 4-bit buffers/line drivers with separate OE inputs.
When OE is low, the devices pass noninverted data from the A inputs to the Y outputs. When OE is high, the
outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE should be tied to V
CC
through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
The SN54ABT244 is characterized for operation over the full military temperature range of 鈭?5擄C to 125擄C. The
SN74ABT244A is characterized for operation from 鈭?0擄C to 85擄C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC-螜螜B is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
錚?/div>
2005, Texas Instruments Incorporated
POST OFFICE BOX 655303
鈥?/div>
DALLAS, TEXAS 75265
2Y1
GND
2A1
1Y4
2A2
1
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