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5962-9070101MEA Datasheet

  • 5962-9070101MEA

  • Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger

  • 12頁

  • TI

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CD54HC109, CD74HC109,
CD54HCT109, CD74HCT109
Data sheet acquired from Harris Semiconductor
SCHS140E
March 1998 - Revised October 2003
Dual J-K Flip-Flop with Set and Reset
Positive-Edge Trigger
Description
The 鈥橦C109 and 鈥橦CT109 are dual J-K 鏗俰p-鏗俹ps with set and
reset. The 鏗俰p-鏗俹p changes state with the positive transition
of Clock (1CP and 2CP).
The 鏗俰p-鏗俹p is set and reset by active-low S and R,
respectively. A low on both the set and reset inputs
simultaneously will force both Q and Q outputs high.
However, both set and reset going high simultaneously
results in an unpredictable output condition.
Features
鈥?Asynchronous Set and Reset
[ /Title
(CD74H
C109,
CD74H
CT109)
/Subject
(Dual J-
K Flip-
Flop
with Set
and
Reset
鈥?Schmitt Trigger Clock Inputs
鈥?Typical f
MAX
= 54MHz at V
CC
= 5V, C
L
= 15pF,
T
A
= 25
o
C
鈥?Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
鈥?Wide Operating Temperature Range . . . -55
o
C to 125
o
C
鈥?Balanced Propagation Delay and Transition Times
鈥?Signi鏗乧ant Power Reduction Compared to LSTTL
Logic ICs
鈥?HC Types
- 2V to 6V Operation
- High Noise Immunity: N
IL
= 30%, N
IH
= 30% of V
CC
at V
CC
= 5V
鈥?HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
V
IL
= 0.8V (Max), V
IH
= 2V (Min)
- CMOS Input Compatibility, I
l
鈮?/div>
1碌A(chǔ) at V
OL
, V
OH
Ordering Information
PART NUMBER
CD54HC109F3A
CD54HCT109F3A
CD74HC109E
CD74HC109M
CD74HC109MT
CD74HC109M96
CD74HCT109E
CD74HCT109M
CD74HCT109MT
CD74HCT109M96
TEMP. RANGE
(
o
C)
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
PACKAGE
16 Ld CERDIP
16 Ld CERDIP
16 Ld PDIP
16 Ld SOIC
16 Ld SOIC
16 Ld SOIC
16 Ld PDIP
16 Ld SOIC
16 Ld SOIC
16 Ld SOIC
Pinout
CD54HC109, CD54HCT109
(CERDIP)
CD74HC109, CD74HCT109
(PDIP, SOIC)
TOP VIEW
1R 1
1J 2
1K 3
1CP 4
1S 5
1Q 6
1Q 7
GND 8
16 V
CC
15 2R
14 2J
13 2K
12 2CP
11 2S
10 2Q
9 2Q
NOTE: When ordering, use the entire part number. The suf鏗亁 96
denotes tape and reel. The suf鏗亁 T denotes a small-quantity reel of
250.
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
漏
2003, Texas Instruments Incorporated
1

5962-9070101MEA 產(chǎn)品屬性

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