CD74HC4518, CD54HC4520,
CD74HC4520, CD74HCT4520
Data sheet acquired from Harris Semiconductor
SCHS216D
November 1997 - Revised October 2003
High-Speed CMOS Logic
Dual Synchronous Counters
having interchangeable CLOCK and ENABLE lines for
incrementing on either the positive-going or the negative-
going transition of CLOCK. The counters are cleared by high
levels on the MASTER RESET lines. The counter can be
cascaded in the ripple mode by connecting Q
3
to the
ENABLE input of the subsequent counter while the CLOCK
input of the latter is held low.
Features
鈥?Positive or Negative Edge Triggering
[ /Title
(CD74
HC451
8,
CD74
HC452
0,
CD74
HCT45
20)
/Sub-
ject
鈥?Synchronous Internal Carry Propagation
鈥?Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
鈥?Wide Operating Temperature Range . . . -55
o
C to 125
o
C
鈥?Balanced Propagation Delay and Transition Times
鈥?Signi鏗乧ant Power Reduction Compared to LSTTL
Logic ICs
鈥?HC Types
- 2V to 6V Operation
- High Noise Immunity: N
IL
= 30%, N
IH
= 30% of V
CC
at V
CC
= 5V
鈥?HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
V
IL
= 0.8V (Max), V
IH
= 2V (Min)
- CMOS Input Compatibility, I
l
鈮?/div>
1碌A at V
OL
, V
OH
Ordering Information
PART NUMBER
CD54HC4520F3A
CD74HC4518E
CD74HC4520E
CD74HC4520M
CD74HC4520MT
CD74HC4520M96
CD74HCT4520E
CD74HCT4520M
CD74HCT4520MT
CD74HCT4520M96
TEMP. RANGE
(
o
C)
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
PACKAGE
16 Ld CERDIP
16 Ld PDIP
16 Ld PDIP
16 Ld SOIC
16 Ld SOIC
16 Ld SOIC
16 Ld PDIP
16 Ld SOIC
16 Ld SOIC
16 Ld SOIC
Description
The CD74HC4518 is a dual BCD up-counter. The 鈥橦C4520
and CD74HCT4520 are dual binary up-counters. Each
device consists of two independent internally synchronous
4-stage counters. The counter stages are D-type 鏗俰p-鏗俹ps
NOTE: When ordering, use the entire part number. The suf鏗亁 96
denotes tape and reel. The suf鏗亁 T denotes a small-quantity reel
of 250.
Pinout
CD54HC4520
(CERDIP)
CD74HC4518
(PDIP)
CD74HC4520, CD74HCT4520,
(PDIP, SOIC)
TOP VIEW
1CP 1
1E 2
1Q
0
3
1Q
1
4
1Q
2
5
1Q
3
6
1MR 7
GND 8
16 V
CC
15 2MR
14 2Q
3
13 2Q
2
12 2Q
1
11 2Q
0
10 2E
9 2CP
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
漏
2003, Texas Instruments Incorporated
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