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5962-8994701MEA Datasheet

  • 5962-8994701MEA

  • High-Speed CMOS Logic 12-Stage Binary Counter

  • 15頁

  • TI

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CD54HC4040, CD74HC4040,
CD54HCT4040, CD74HCT4040
Data sheet acquired from Harris Semiconductor
SCHS203D
February 1998 - Revised October 2003
High-Speed CMOS Logic
12-Stage Binary Counter
Description
The 鈥橦C4040 and 鈥橦CT4040 are 14-stage ripple-carry
binary counters. All counter stages are master-slave 鏗俰p-
鏗俹ps. The state of the stage advances one count on the
negative clock transition of each input pulse; a high voltage
level on the MR line resets all counters to their zero state. All
inputs and outputs are buffered.
Features
鈥?Fully Static Operation
[ /Title
(CD74H
C4040,
CD74HC
T4040)
/Subject
(High
Speed
CMOS
Logic
12-Stage
Binary
鈥?Buffered Inputs
鈥?Common Reset
鈥?Negative Edge Pulsing
鈥?Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
鈥?Wide Operating Temperature Range . . . -55
o
C to 125
o
C
鈥?Balanced Propagation Delay and Transition Times
鈥?Signi鏗乧ant Power Reduction Compared to LSTTL
Logic ICs
鈥?HC Types
- 2V to 6V Operation
- High Noise Immunity: N
IL
= 30%, N
IH
= 30% of V
CC
at V
CC
= 5V
鈥?HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
V
IL
= 0.8V (Max), V
IH
= 2V (Min)
- CMOS Input Compatibility, I
l
鈮?/div>
1碌A(chǔ) at V
OL
, V
OH
Ordering Information
PART NUMBER
CD54HC4040F3A
CD54HCT4040F3A
CD74HC4040E
CD74HC4040M
CD74HC4040MT
CD74HC4040M96
CD74HC4040NSR
CD74HCT4040E
CD74HCT4040M
CD74HCT4040MT
CD74HCT4040M96
TEMP. RANGE
(
o
C)
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
PACKAGE
16 Ld CERDIP
16 Ld CERDIP
16 Ld PDIP
16 Ld SOIC
16 Ld SOIC
16 Ld SOIC
16 Ld SOP
16 Ld PDIP
16 Ld SOIC
16 Ld SOIC
16 Ld SOIC
NOTE: When ordering, use the entire part number. The suf鏗亁es 96
and R denote tape and reel. The suf鏗亁 T denotes a small-quantity
reel of 250.
Pinout
CD54HC4040, CD54HCT4040
(CERDIP)
CD74HC4040
(PDIP, SOIC, SOP)
CD74HCT4040
(PDIP, SOIC)
TOP VIEW
Q
12
1
Q
6
2
Q
5
3
Q7 4
Q
4
5
Q
3
6
Q
2
7
GND 8
16 V
CC
15 Q
11
14 Q
10
13 Q
8
12 Q
9
11 MR
10 CP
9 Q
1
鈥?/div>
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
漏
2003, Texas Instruments Incorporated
1

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