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5962-8976901RA Datasheet

  • 5962-8976901RA

  • High-Speed CMOS Logic Octal D-Type Flip-Flop With Data Enabl...

  • 13頁(yè)

  • TI

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CD54HC377, CD74HC377,
CD54HCT377, CD74HCT377
Data sheet acquired from Harris Semiconductor
SCHS184C
September 1997 - Revised February 2004
High-Speed CMOS Logic
Octal D-Type Flip-Flop With Data Enable
Description
The 鈥橦C377 and 鈥橦CT377 are octal D-type 鏗俰p-鏗俹ps with a
buffered clock (CP) common to all eight 鏗俰p-鏗俹ps. All the 鏗俰p-
鏗俹ps are loaded simultaneously on the positive edge of the
clock (CP) when the Data Enable (E) is Low.
Features
鈥?Buffered Common Clock
[ /Title
(CD74
HC377
,
CD74
HCT37
7)
/Sub-
ject
(High
Speed
CMOS
Logic
Octal
D-
Type
Flip-
鈥?Buffered Inputs
鈥?Typical Propagation Delay at C
L
= 15pF,
V
CC
= 5V, T
A
= 25
o
C
- 14 ns (HC Types
- 16 ns (HCT Types)
鈥?Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
鈥?Wide Operating Temperature Range . . . -55
o
C to 125
o
C
鈥?Balanced Propagation Delay and Transition Times
鈥?Signi鏗乧ant Power Reduction Compared to LSTTL
Logic ICs
鈥?HC Types
- 2V to 6V Operation
- High Noise Immunity: N
IL
= 30%, N
IH
= 30%of V
CC
at
V
CC
= 5V
鈥?HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
V
IL
= 0.8V (Max), V
IH
= 2V (Min)
- CMOS Input Compatibility, I
l
鈮?/div>
1碌A(chǔ) at V
OL
, V
OH
Ordering Information
PART NUMBER
CD54HC377F3A
CD54HCT377F3A
CD74HC377E
CD74HC377M
CD74HC377M96
CD74HC377PW
CD74HC377PWR
CD74HCT377E
CD74HCT377M
CD74HCT377M96
TEMP. RANGE
(
o
C)
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
PACKAGE
20 Ld CERDIP
20 Ld CERDIP
20 Ld PDIP
20 Ld SOIC
20 Ld SOIC
20 Ld TSSOP
20 Ld TSSOP
20 Ld PDIP
20 Ld SOIC
20 Ld SOIC
NOTE: When ordering, use the entire part number. The suf鏗亁es
96 and R denote tape and reel.
Pinout
CD54HC377, CD54HCT377
(CERDIP)
CD74HC377
(PDIP, SOIC, TSSOP)
CD74HCT377
(PDIP, SOIC)
TOP VIEW
E
Q
0
D
0
D
1
Q
1
Q
2
D
2
D
3
Q
3
1
2
3
4
5
6
7
8
9
20 V
CC
19 Q
7
18 D
7
17 D
6
16 Q
6
15 Q
5
14 D
5
13 D
4
12 Q
4
11 CP
GND 10
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
漏
2004, Texas Instruments Incorporated
1

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