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5962-8974001RA Datasheet

  • 5962-8974001RA

  • High-Speed CMOS Logic Octal Three-State Bus Transceiver, Inv...

  • 11頁

  • TI

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CD54HC640, CD74HC640,
CD54HCT640, CD74HCT640
Data sheet acquired from Harris Semiconductor
SCHS192B
January 1998 - Revised May 2003
High-Speed CMOS Logic
Octal Three-State Bus Transceiver, Inverting
Description
The 鈥橦C640 and 鈥橦CT640 silicon-gate CMOS three-state
bidirectional inverting and non-inverting buffers are intended
for two-way asynchronous communication between data
buses. They have high drive current outputs which enable
high-speed operation when driving large bus capacitances.
These circuits possess the low power dissipation of CMOS
circuits, and have speeds comparable to low power Schottky
TTL circuits. They can drive 15 LSTTL loads. The 鈥橦C640
and 鈥橦CT640 are inverting buffers.
The direction of data 鏗俹w (A to B, B to A) is controlled by the
DIR input.
Outputs are enabled by a low on the Output Enable input
(OE); a high OE puts these devices in the high impedance
mode.
Features
鈥?Buffered Inputs
[ /Title
(CD74
HC640
,
CD74
HCT64
0)
/Sub-
ject
(High
Speed
CMOS
鈥?Three-State Outputs
鈥?Applications in Multiple-Data-Bus Architecture
鈥?Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
鈥?Wide Operating Temperature Range . . . -55
o
C to 125
o
C
鈥?Balanced Propagation Delay and Transition Times
鈥?Signi鏗乧ant Power Reduction Compared to LSTTL
Logic ICs
鈥?HC Types
- 2V to 6V Operation
- High Noise Immunity: N
IL
= 30%, N
IH
= 30% of V
CC
at V
CC
= 5V
鈥?HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
V
IL
= 0.8V (Max), V
IH
= 2V (Min)
- CMOS Input Compatibility, I
l
鈮?/div>
1碌A(chǔ) at V
OL
, V
OH
Ordering Information
PART NUMBER
CD54HC640F3A
CD54HCT640F3A
CD74HC640E
CD74HC640M
TEMP. RANGE
(
o
C)
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
PACKAGE
20 Ld CERDIP
20 Ld CERDIP
20 Ld PDIP
20 Ld SOIC
20 Ld PDIP
20 Ld SOIC
Pinout
CD54HC640, CD54HCT640
(CERDIP)
CD74HC640, CD74HCT640
(PDIP, SOIC)
TOP VIEW
DIR
A0
A1
A2
A3
A4
A5
A6
A7
1
2
3
4
5
6
7
8
9
20 V
CC
19 OE
18 B0
17 B1
16 B2
15 B3
14 B4
13 B5
12 B6
11 B7
CD74HCT640E
CD74HCT640M
GND 10
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
漏
2003, Texas Instruments Incorporated
1

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