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5962-8875901EA Datasheet

  • 5962-8875901EA

  • High-Speed CMOS Logic Quad D-Type Flip-Flop, Three-State

  • 17頁

  • TI

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CD54HC173, CD74HC173,
CD54HCT173, CD74HCT173
Data sheet acquired from Harris Semiconductor
SCHS158E
February 1998 - Revised October 2003
High-Speed CMOS Logic
Quad D-Type Flip-Flop, Three-State
Description
The 鈥橦C173 and 鈥橦CT173 high speed three-state quad D-
type 鏗俰p-鏗俹ps are fabricated with silicon gate CMOS technol-
ogy. They possess the low power consumption of standard
CMOS Integrated circuits, and can operate at speeds com-
parable to the equivalent low power Schottky devices. The
buffered outputs can drive 15 LSTTL loads. The large output
drive capability and three-state feature make these parts ide-
ally suited for interfacing with bus lines in bus oriented sys-
tems.
The four D-type 鏗俰p-鏗俹ps operate synchronously from a com-
mon clock. The outputs are in the three-state mode when
either of the two output disable pins are at the logic 鈥?鈥?level.
The input ENABLES allow the 鏗俰p-鏗俹ps to remain in their
present states without having to disrupt the clock If either of
the 2 input ENABLES are taken to a logic 鈥?鈥?level, the Q
outputs are fed back to the inputs, forcing the 鏗俰p-鏗俹ps to
remain in the same state. Reset is enabled by taking the
MASTER RESET (MR) input to a logic 鈥?鈥?level. The data
outputs change state on the positive going edge of the clock.
The 鈥橦CT173 logic family is functionally, as well as pin com-
patible with the standard LS logic family
.
Features
鈥?Three-State Buffered Outputs
[ /Title
(CD74H
C173,
CD74H
CT173)
/Subject
(High
Speed
CMOS
Logic
Quad D-
Type
鈥?Gated Input and Output Enables
鈥?Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
鈥?Wide Operating Temperature Range . . . -55
o
C to 125
o
C
鈥?Balanced Propagation Delay and Transition Times
鈥?Signi鏗乧ant Power Reduction Compared to LSTTL
Logic ICs
鈥?HC Types
- 2V to 6V Operation
- High Noise Immunity: N
IL
= 30%, N
IH
= 30% of V
CC
at V
CC
= 5V
鈥?HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
V
IL
= 0.8V (Max), V
IH
= 2V (Min)
- CMOS Input Compatibility, I
l
鈮?/div>
1碌A(chǔ) at V
OL
, V
OH
Pinout
CD54HC173, CD54HCT173
(CERDIP)
CD74HC173
(PDIP, SOIC, SOP, TSSOP)
CD74HCT173
(PDIP, SOIC)
TOP VIEW
OE 1
OE2 2
Q
0
3
Q
1
4
Q
2
5
Q
3
6
CP 7
GND 8
16 V
CC
15 MR
14 D0
13 D1
12 D2
11 D3
10 E2
9 E1
Ordering Information
PART NUMBER
CD54HC173F3A
CD54HCT173F3A
CD74HC173E
CD74HC173M
CD74HC173MT
CD74HC173M96
CD74HC173NSR
CD74HC173PW
CD74HC173PWR
CD74HC173PWT
CD74HCT173E
CD74HCT173M
CD74HCT173MT
CD74HCT173M96
TEMP. RANGE
(
o
C)
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
PACKAGE
16 Ld CERDIP
16 Ld CERDIP
16 Ld PDIP
16 Ld SOIC
16 Ld SOIC
16 Ld SOIC
16 Ld SOP
16 Ld TSSOP
16 Ld TSSOP
16 Ld TSSOP
16 Ld PDIP
16 Ld SOIC
16 Ld SOIC
16 Ld SOIC
NOTE: When ordering, use the entire part number. The suf鏗亁es 96
and R denote tape and reel. The suf鏗亁 T denotes a small-quantity
reel of 250.
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
漏
2003, Texas Instruments Incorporated
1

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