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5962-8772501RA Datasheet

  • 5962-8772501RA

  • High-Speed CMOS Logic Octal D-Type Flip-Flop with Reset

  • 13頁

  • TI

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Data sheet acquired from Harris Semiconductor
SCHS174B
CD54HC273, CD74HC273,
CD54HCT273, CD74HCT273
High-Speed CMOS Logic
Octal D-Type Flip-Flop with Reset
Description
The 鈥橦C273 and 鈥橦CT273 high speed octal D-Type flip-flops
with a direct clear input are manufactured with silicon-gate
CMOS technology. They possess the low power consumption
of standard CMOS integrated circuits.
Information at the D inputis transferred to the Q outputs on
the positive-going edge of the clock pulse. All eight 鏗俰p-鏗俹ps
are controlled by a common clock (CP) and a common reset
(MR). Resetting is accomplished by a low voltage level
independent of the clock. All eight Q outputs are reset to a
logic 0.
February 1998 - Revised May 2003
Features
鈥?Common Clock and Asynchronous Master Reset
[ /Title
(CD74
HC273
,
CD74
HCT27
3)
/Sub-
ject
(High
Speed
CMOS
Logic
Octal
D-
Type
Flip-
鈥?Positive Edge Triggering
鈥?Buffered Inputs
鈥?Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
鈥?Wide Operating Temperature Range . . . -55
o
C to 125
o
C
鈥?Balanced Propagation Delay and Transition Times
鈥?Signi鏗乧ant Power Reduction Compared to LSTTL
Logic ICs
鈥?HC Types
- 2V to 6V Operation
- High Noise Immunity: N
IL
= 30%, N
IH
= 30% of V
CC
at V
CC
= 5V
鈥?HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
V
IL
= 0.8V (Max), V
IH
= 2V (Min)
- CMOS Input Compatibility, I
l
鈮?/div>
1碌A(chǔ) at V
OL
, V
OH
Ordering Information
PART NUMBER
CD54HC273F3A
CD74HC273E
CD74HC273M
CD74HC273M96
CD54HCT273F3A
CD74HCT273E
CD74HCT273M
CD74HCT273M96
TEMP. RANGE (
o
C)
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
PACKAGE
20 Ld CERDIP
20 Ld PDIP
20 Ld SOIC
20 Ld SOIC
20 Ld CERDIP
20 Ld PDIP
20 Ld SOIC
20 Ld SOIC
NOTE: When ordering, use the entire part number. The suf鏗亁 96
denotes tape and reel.
Pinout
CD54HC273, CD54HCT273
(CERDIP)
CD74HC273, CD74HCT273
(PDIP, SOIC)
TOP VIEW
MR 1
Q0 2
D0 3
D1 4
Q1 5
Q2 6
D2 7
D3 8
Q3 9
GND 10
20 V
CC
19 Q7
18 D7
17 D6
16 Q6
15 Q5
14 D5
13 D4
12 Q4
11 CP
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
漏
2003, Texas Instruments Incorporated
1

5962-8772501RA 產(chǎn)品屬性

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