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5962-8688601EA Datasheet

  • 5962-8688601EA

  • High-Speed CMOS Logic Dual Retriggerable Precision Monostabl...

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  • TI

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CD54HC4538, CD74HC4538,
CD54HCT4538, CD74HCT4538
Data sheet acquired from Harris Semiconductor
SCHS123E
June 1998 - Revised October 2003
High-Speed CMOS Logic Dual Retriggerable
Precision Monostable Multivibrator
Description
The
鈥橦C4538
and
鈥橦CT4538
are
dual
retriggerable/resettable monostable precision multivibrators
for 鏗亁ed voltage timing applications. An external resistor
(R
X
) and an external capacitor (C
X
) control the timing and
the accuracy for the circuit. Adjustment of R
X
and C
X
provides a wide range of output pulse widths from the Q and
Q terminals. The propagation delay from trigger input-to-
output transition and the propagation delay from reset input-
to-output transition are independent of R
X
and C
X
.
Leading-edge triggering (A) and trailing edge triggering (B)
inputs are provided for triggering from either edge of the
input pulse. An unused 鈥淎鈥?input should be tied to GND and
an unused B should be tied to V
CC
. On power up the IC is
reset. Unused resets and sections must be terminated. In
normal operation the circuit retriggers on the application of
each new trigger pulse. To operate in the non-triggerable
mode Q is connected to B when leading edge triggering (A)
is used or Q is connected to A when trailing edge triggering
(B) is used. The period (蟿) can be calculated from
蟿
= (0.7)
R
X
, C
X
; R
MIN
is 5k鈩? C
MIN
is 0pF.
Features
鈥?Retriggerable/Resettable Capability
鈥?Trigger and Reset Propagation Delays Independent of
R
X
, C
X
鈥?Triggering from the Leading or Trailing Edge
鈥?Q and Q Buffered Outputs Available
鈥?Separate Resets
鈥?Wide Range of Output Pulse Widths
鈥?Schmitt Trigger Input on A and B Inputs
鈥?Retrigger Time is Independent of C
X
鈥?Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
鈥?Wide Operating Temperature Range . . . -55
o
C to 125
o
C
鈥?Balanced Propagation Delay and Transition Times
鈥?Signi鏗乧ant Power Reduction Compared to LSTTL
Logic ICs
鈥?HC Types
- 2V to 6V Operation
- High Noise Immunity: N
IL
= 30%, N
IH
= 30% of V
CC
at V
CC
= 5V
鈥?HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
V
IL
= 0.8V (Max), V
IH
= 2V (Min)
- CMOS Input Compatibility, I
l
鈮?/div>
1碌A(chǔ) at V
OL
, V
OH
[ /Title
(CD54
HC453
8,
CD74
HC453
8,
CD74
HCT45
38)
/Sub-
ject
(High
Speed
CMOS
Logic
Ordering Information
PART NUMBER
CD54HC4538F3A
CD54HCT4538F3A
CD74HC4538E
CD74HC4538M
CD74HC4538MT
CD74HC4538M96
TEMP. RANGE
(
o
C)
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
PACKAGE
16 Ld CERDIP
16 Ld CERDIP
16 Ld PDIP
16 Ld SOIC
16 Ld SOIC
16 Ld SOIC
16 Ld SOP
16 Ld TSSOP
16 Ld TSSOP
16 Ld TSSOP
16 Ld PDIP
16 Ld SOIC
16 Ld SOIC
16 Ld SOIC
Pinout
CD54HC4538, CD54HCT4538
(CERDIP)
CD74HC4538
(PDIP, SOIC, SOP, TSSOP)
CD74HCT4538
(PDIP, SOIC)
TOP VIEW
1C
X
1
1R
X
C
X
2
1R 3
1A 4
1B 5
1Q 6
1Q 7
GND 8
16 V
CC
15 2C
X
14 2R
X
C
X
13 2R
12 2A
11 2B
10 2Q
9 2Q
CD74HC4538NSR
CD74HC4538PW
CD74HC4538PWR
CD74HC4538PWT
CD74HCT4538E
CD74HCT4538M
CD74HCT4538MT
CD74HCT4538M96
NOTE: When ordering, use the entire part number. The suf鏗亁es 96
and R denote tape and reel. The suf鏗亁 T denotes a small-quantity
reel of 250.
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
漏
2003, Texas Instruments Incorporated
1

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