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5962-8606201RA Datasheet

  • 5962-8606201RA

  • High-Speed CMOS Logic Octal Inverting Transparent Latch, Thr...

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CD54/74HC533, CD54/74HCT533,
CD54/74HC563, CD74HCT563
Data sheet acquired from Harris Semiconductor
SCHS187C
January 1998 - Revised July 2003
High-Speed CMOS Logic Octal Inverting
Transparent Latch, Three-State Outputs
Description
The 鈥橦C533, 鈥橦CT533, 鈥橦C563, and CD74HCT563 are
high-speed Octal Transparent Latches manufactured with
silicon gate CMOS technology. They possess the low power
consumption of standard CMOS integrated circuits, as well as
the ability to drive 15 LSTTL devices.
The outputs are transparent to the inputs when the latch
enable (LE) is high. When the latch enable (LE) goes low the
data is latched. The output enable (OE) controls the
three-state outputs. When the output enable (OE) is high the
outputs are in the high impedance state. The latch operation
is independent of the state of the output enable.
The 鈥橦C533 and 鈥橦CT533 are identical in function to the
鈥橦C563 and CD74HCT563 but have different pinouts. The
鈥橦C533 and 鈥橦CT533 are similar to the 鈥橦C373 and 鈥橦CT373;
the latter are non-inverting types.
Features
鈥?Common Latch-Enable Control
[ /Title
(CD74H
C533,
CD74H
CT533,
CD74H
C563,
CD74H
CT563)
/Subject
(High
Speed
鈥?Common Three-State Output Enable Control
鈥?Buffered Inputs
鈥?Three-State Outputs
鈥?Bus Line Driving Capacity
鈥?Typical Propagation Delay = 13ns at V
CC
= 5V,
C
L
= 15pF, T
A
= 25
o
C (Data to Output)
鈥?Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
鈥?Wide Operating Temperature Range . . . -55
o
C to 125
o
C
鈥?Balanced Propagation Delay and Transition Times
鈥?Signi鏗乧ant Power Reduction Compared to LSTTL
Logic ICs
鈥?HC Types
- 2V to 6V Operation
- High Noise Immunity: N
IL
= 30%, N
IH
= 30% of V
CC
at V
CC
= 5V
鈥?HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
V
IL
= 0.8V (Max), V
IH
= 2V (Min)
- CMOS Input Compatibility, I
l
鈮?/div>
1碌A(chǔ) at V
OL
, V
OH
Ordering Information
PART NUMBER
CD54HC533F3A
CD54HC563F3A
CD54HCT533F3A
CD74HC533E
CD74HC563E
CD74HC563M
CD74HCT533E
CD74HCT563E
CD74HCT563M
TEMP. RANGE
(
o
C)
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
PACKAGE
20 Ld CERDIP
20 Ld CERDIP
20 Ld CERDIP
20 Ld PDIP
20 Ld PDIP
20 Ld SOIC
20 Ld PDIP
20 Ld PDIP
20 Ld SOIC
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
漏
2003, Texas Instruments Incorporated
1

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