鈥?/div>
Schottky Process for High Speed
Multifunction Capability
On-Chip Select Logic Decoding
Fully Buffered Complementary Outputs
Input Clamp Diodes Limit High Speed Termination Effects
J SUFFIX
CERAMIC
CASE 620-09
CONNECTION DIAGRAM DIP
(TOP VIEW)
VCC
16
I4
15
I5
14
I6
13
I7
12
S0
11
S1
10
S2
9
16
1
16
1
N SUFFIX
PLASTIC
CASE 648-08
1
I3
2
I2
3
I1
4
I0
5
Z
6
Z
7
E
8
GND
16
1
D SUFFIX
SOIC
CASE 751B-03
ORDERING INFORMATION
SN54LSXXXJ
SN74LSXXXN
SN74LSXXXD
Ceramic
Plastic
SOIC
PIN NAMES
S0 鈥?S2
E
I0 鈥?I7
Z
Z
Select Inputs
Enable (Active LOW) Input
Multiplexer Inputs
Multiplexer Output (Note b)
Complementary Multiplexer Output
(Note b)
LOADING
(Note a)
HIGH
0.5 U.L.
0.5 U.L.
0.5 U.L.
10 U.L.
10 U.L.
LOW
0.25 U.L.
0.25 U.L.
0.25 U.L.
5 (2.5) U.L.
5 (2.5) U.L.
LOGIC SYMBOL
7 4 3 2 1 15 14 13 12
E I0 I1 I2 I3 I4 I5 I6 I7
S0
S1
S2
Z
Z
6
5
NOTES:
a) 1 TTL Unit Load (U.L.) = 40
碌A
HIGH/1.6 mA LOW.
b) The Output LOW drive factor is 2.5 U.L. for Military (54) and 5 U.L. for Commercial (74)
Temperature Ranges.
11
10
9
VCC = PIN 16
GND = PIN 8
FAST AND LS TTL DATA
5-252