54LCX16373 Low Voltage 16-Bit Transparent Latch with 5V Tolerant Inputs and Outputs
June 1999
54LCX16373
Low Voltage 16-Bit Transparent Latch with 5V Tolerant
Inputs and Outputs
General Description
The LCX16373 contains sixteen non-inverting latches with
TRI-STATE
廬
outputs and is intended for bus oriented appli-
cations. The device is byte controlled. The flip-flops appear
transparent to the data when the Latch Enable (LE) is HIGH.
When LE is low, the data that meets the setup time is
latched. Data appears on the bus when the Output Enable
(OE) is LOW. When OE is HIGH, the outputs are in TRI-
STATE.
The LCX16373 is designed for low voltage (3.3V) V
CC
appli-
cations with capability of interfacing to a 5V signal environ-
ment.
The LCX16373 is fabricated with an advanced CMOS tech-
nology to achieve high speed operation while maintaining
CMOS low power dissipation.
Features
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5V tolerant inputs and outputs
Power down high impedance inputs and outputs
Supports live insertion/withdrawal
2.0V鈥?.6V V
CC
supply operation
鹵
24 mA output drive
Implements patented noise/EMI reduction circuitry
Functionally compatible with the 54 series 16373
ESD performance:
Human body model
>
2000V
Machine model
>
200V
n
Standard Microcircuit Drawing (SMD) 5962-9953401
Ordering Code
Order Number
54LCX16373W-QML
Package Number
WA48A
Package Description
48-Lead Ceramic Flatpack
Logic Symbol
Connection Diagram
Pin Assignment for
Cerpack
DS101200-1
Pin Descriptions
Pin Names
OE
n
LE
n
I
0
鈥揑
15
O
0
鈥揙
15
Description
Output Enable Input (Active Low)
Latch Enable Input
Inputs
Outputs
DS101200-2
TRI-STATE
廬
is a registered trademark of National Semiconductor Corporation.
漏 1999 National Semiconductor Corporation
DS101200
www.national.com
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