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54HC32 Datasheet

  • 54HC32

  • Quad 2-Input OR Gate

  • 141.72KB

  • 5頁

  • ONSEMI

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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Quad 2-Input OR Gate
The MC74VHC32 is an advanced high speed CMOS 2鈥搃nput OR gate
fabricated with silicon gate CMOS technology. It achieves high speed
operation similar to equivalent Bipolar Schottky TTL while maintaining
CMOS low power dissipation.
The internal circuit is composed of three stages, including a buffer output
which provides high noise immunity and stable output. The inputs tolerate
voltages up to 7V, allowing the interface of 5V systems to 3V systems.
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High Speed: tPD = 3.8ns (Typ) at VCC = 5V
Low Power Dissipation: ICC = 2碌A(chǔ) (Max) at TA = 25擄C
High Noise Immunity: VNIH = VNIL = 28% VCC
Power Down Protection Provided on Inputs
Balanced Propagation Delays
Designed for 2V to 5.5V Operating Range
Low Noise: VOLP = 0.8V (Max)
Pin and Function Compatible with Other Standard Logic Families
Latchup Performance Exceeds 300mA
ESD Performance: HBM > 2000V; Machine Model > 200V
Chip Complexity: 48 FETs or 12 Equivalent Gates
MC74VHC32
D SUFFIX
14鈥揕EAD SOIC PACKAGE
CASE 751A鈥?3
DT SUFFIX
14鈥揕EAD TSSOP PACKAGE
CASE 948G鈥?1
M SUFFIX
14鈥揕EAD SOIC EIAJ PACKAGE
CASE 965鈥?1
LOGIC DIAGRAM
ORDERING INFORMATION
A1
B1
A2
B2
A3
B3
A4
B4
1
3
2
4
6
5
9
8
10
12
11
13
Y4
Y3
A
L
L
H
H
Y2
Y = A+B
Y1
MC74VHCXXD
MC74VHCXXDT
MC74VHCXXM
SOIC
TSSOP
SOIC EIAJ
FUNCTION TABLE
Inputs
B
L
H
L
H
Output
Y
L
H
H
H
Pinout: 14鈥揕ead Packages
(Top View)
VCC
14
B4
13
A4
12
Y4
11
B3
10
A3
9
Y3
8
1
A1
2
B1
3
Y1
4
A2
5
B2
6
Y2
7
GND
6/97
漏
Motorola, Inc. 1997
1
REV 1

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