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MOTOROLA

SEMICONDUCTOR TECHNICAL DATA

Octal Bus Transceiver

The MC74VHC245 is an advanced high speed CMOS octal bus

transceiver fabricated with silicon gate CMOS technology. It achieves high

speed operation similar to equivalent Bipolar Schottky TTL while maintaining

CMOS low power dissipation.

It is intended for two鈥搘ay asynchronous communication between data

buses. The direction of data transmission is determined by the level of the

DIR input. The output enable pin (OE) can be used to disable the device, so

that the buses are effectively isolated.

All inputs are equipped with protection circuits against static discharge.

鈥?/div>

High Speed: tPD = 4.0ns (Typ) at VCC = 5V

Low Power Dissipation: ICC = 4碌A(chǔ) (Max) at TA = 25擄C

High Noise Immunity: VNIH = VNIL = 28% VCC

Power Down Protection Provided on Inputs

Balanced Propagation Delays

Designed for 2V to 5.5V Operating Range

Low Noise: VOLP = 1.2V (Max)

Pin and Function Compatible with Other Standard Logic Families

Latchup Performance Exceeds 300mA

ESD Performance: HBM > 2000V; Machine Model > 200V

Chip Complexity: 308 FETs or 77 Equivalent Gates

MC74VHC245

DW SUFFIX

20鈥揕EAD SOIC PACKAGE

CASE 751D鈥?4

DT SUFFIX

20鈥揕EAD TSSOP PACKAGE

CASE 948E鈥?2

APPLICATION NOTES

1. Do not force a signal on an I/O pin when it is an active output, damage may

occur.

2. All floating (high impedence) input or I/O pins must be fixed by means of

pull up or pull down resistors or bus terminator ICs.

3. A parasitic diode is formed between the bus and VCC terminals. Therefore,

the VHC245 cannot be used to interface 5V to 3V systems directly.

LOGIC DIAGRAM

A1

A2

A3

A

DATA

PORT

A4

A5

A6

A7

A8

DIR

OE

2

3

4

5

6

7

8

9

1

19

18

17

16

15

14

13

12

11

B1

B2

B3

B4

B5

B6

B7

B8

B

DATA

PORT

M SUFFIX

20鈥揕EAD SOIC EIAJ PACKAGE

CASE 967鈥?1

ORDERING INFORMATION

MC74VHCXXXDW

SOIC

MC74VHCXXXDT

TSSOP

MC74VHCXXXM

SOIC EIAJ

PIN ASSIGNMENT

DIR

A1

A2

A3

A4

A5

A6

A7

A8

GND

1

2

3

4

5

6

7

8

9

10

20

19

18

17

16

15

14

13

12

11

VCC

OE

B1

B2

B3

B4

B5

B6

B7

B8

FUNCTION TABLE

Control Inputs

OE

L

H

DIR

L

H

X

Operation

O

i

Data Transmitted from Bus B to Bus A

Data Transmitted from Bus A to Bus B

Buses Isolated (High鈥揑mpedance State)

6/97

漏

Motorola, Inc. 1997

1

REV 1

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