54FCT533 Datasheet

IC型號：
54FCT533
PDF描述：
Octal Transparent Latch with TRI-STATE Outputs
文件大小：
156.51KB
PDF頁數(shù)：
6頁
芯片廠家：
NSC

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54FCT533 Octal Transparent Latch with TRI-STATE Outputs

September 1998

54FCT533

Octal Transparent Latch with TRI-STATE

廬

Outputs

General Description

The FCT533 consists of eight latches with TRI-STATE out-

puts for bus organized system applications. The flip-flops ap-

pear transparent to the data when Latch Enable (LE) is

HIGH. When LE is low, the data satisfying the input timing re-

quirements is latched. Data appears on the bus when the

Output Enable (OE) is LOW. When OE is HIGH, the bus out-

put is in the high impedance state.

Features

Eight latches in a single package

TTL input and output level compatible

CMOS power consumption

TRI-STATE outputs drive bus lines or buffer memory

address registers

Output sink capability of 32mA, source capability of 12

Inverted version of the FCT373

Standard Microcircuit Drawing (SMD) 5962-8865101

Logic Symbols

IEEE/IEC

DS100969-1

DS100969-2

Names

鈥揇

鈥揙

Description

Data Inputs

Latch Enable Input

Output Enable Input

TRI-STATE Latch

Outputs

TRI-STATE

廬

is a registered trademark of National Semiconductor Corporation.

FACT

鈩?/div>

is a trademark of Fairchild Semiconductor Corporation.

漏 1998 National Semiconductor Corporation

DS100969

www.national.com

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