MILITARY DATA SHEET
MN54F676-X REV 1A0
Original Creation Date: 05/10/96
Last Update Date: 07/30/96
Last Major Revision Date: 05/10/96
16-BIT SERIAL/PARALLEL-IN, SERIAL-OUT SHIFT REGISTER
General Description
The F676 contains 16 flip-flops with provision for synchronous parallel or serial entry
and serial output. When the Mode (M) input is HIGH, information present on the parallel
data (P0-P15) inputs is entered on the falling edge of the Clock Pulse (CP) input signal.
When M is LOW, data is shifted out of the most significant bit position while information
present on the Serial (SI) input shifts into the least significant bit position. A HIGH
signal on the Chip Select (CS) input prevents both parallel and serial operations.
Industry Part Number
54F676
NS Part Numbers
54F676DMQB
54F676FMQB
54F676LMQB
Prime Die
M676
Processing
MIL-STD-883, Method 5004
Subgrp Description
1
2
3
4
5
6
7
8A
8B
9
10
11
Static tests at
Static tests at
Static tests at
Dynamic tests at
Dynamic tests at
Dynamic tests at
Functional tests at
Functional tests at
Functional tests at
Switching tests at
Switching tests at
Switching tests at
Temp (
o
C)
+25
+125
-55
+25
+125
-55
+25
+125
-55
+25
+125
-55
Quality Conformance Inspection
MIL-STD-883, Method 5005
1