鈩?/div>
output
control and undershoot corrector in addition to a split ground
bus for superior performance.
Features
n
Guaranteed simultaneous switching noise level and
dynamic threshold performance
n
Non-inverting TRI-STATE outputs for bus interfacing
n
4 kV minimum ESD immunity
n
Outputs source/sink 24 mA
n
Functionally identical to the AM29821
Logic Symbols
Connection Diagrams
Pin Assignment
for DIP and Flatpak
DS100247-1
IEEE/IEC
DS100247-3
Pin Assignment for LCC
DS100247-2
Pin Names
D
0
鈥揇
9
O
0
鈥揙
9
OE
CP
Description
Data Inputs
Data Outputs
Output Enable Input
Clock Input
DS100247-4
GTO
鈩?/div>
is a trademark of National Semiconductor Corporation.
TRI-STATE
廬
is a registered trademark of National Semiconductor Corporation.
FACT
廬
is a registered trademark of Fairchild Semiconductor Corporation.
FACT Quiet Series
鈩?/div>
is a trademark of Fairchild Semiconductor Corporation.
漏 1998 National Semiconductor Corporation
DS100247
www.national.com
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