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54ACTQ10 Quiet Series Triple 3-Input NAND Gate

September 1998

54ACTQ10

Quiet Series Triple 3-Input NAND Gate

General Description

The 鈥橝CTQ10 contains three, 3-input NAND gates and uti-

lizes NSC Quiet Series technology to guarantee quiet output

switching and improved dynamic threshold performance.

FACT Quiet Series

廬

features GTO

廬

output control and un-

dershoot corrector in addition to a split ground bus for supe-

rior ACMOS performance.

n

Guaranteed simultaneous switching noise level and

dynamic threshold performance

n

Improved latch-up immunity

n

Minimum 2 kV ESD protection

n

Outputs source/sink 24 mA

n

鈥橝CTQ10 has TTL-compatible inputs

n

Standard Microcircuit Drawing (SMD) 5962-9218201

Features

n

I

CC

reduced by 50%

Logic Symbol

IEEE/IEC

Connection Diagrams

Pin Assignment

for DIP and Flatpak

DS010892-1

DS010892-2

Pin Names

A

n

, B

n

, C

n

O

n

Description

Inputs

Outputs

Pin Assignment

for LCC

DS010892-3

GTO

廬

is a trademark of National Semiconductor Corporation.

FACT

廬

and FACT Quiet Series

廬

are trademarks of Fairchild Semiconductor Corporation.

漏 1998 National Semiconductor Corporation

DS010892

www.national.com

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