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4515B Datasheet

  • 4515B

  • 4-Bit Latched/4-to-16 Line Decoders

  • 87.92KB

  • 8頁(yè)

  • FAIRCHILD

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CD4514BC鈥?CD4515BC 4-Bit Latched/4-to-16 Line Decoders
October 1987
Revised August 2000
CD4514BC鈥?CD4515BC
4-Bit Latched/4-to-16 Line Decoders
General Description
The CD4514BC and CD4515BC are 4-to-16 line decoders
with latched inputs implemented with complementary MOS
(CMOS) circuits constructed with N- and P-channel
enhancement mode transistors. These circuits are prima-
rily used in decoding applications where low power dissipa-
tion and/or high noise immunity is required.
The CD4514BC (output active high option) presents a logi-
cal 鈥?鈥?at the selected output, whereas the CD4515BC pre-
sents a logical 鈥?鈥?at the selected output. The input latches
are R鈥揝 type flip-flops, which hold the last input data pre-
sented prior to the strobe transition from 鈥?鈥?to 鈥?鈥? This
input data is decoded and the corresponding output is acti-
vated. An output inhibit line is also available.
Features
s
Wide supply voltage range:
s
Low power TTL: fan out of 2
compatibility:
driving 74L
s
Low quiescent power dissipation:
0.025
碌
W/package @ 5.0 V
DC
s
Single supply operation
s
Input impedance
=
10
12
鈩?/div>
typically
s
Plug-in replacement for MC14514, MC14515
3.0V to 15V
s
High noise immunity: 0.45 V
DD
(typ.)
Ordering Code:
Order Number
CD4514BCWM
CD4514BCN
CD4515BCWM
CD4515BCN
Package Number
M24B
N24A
M24B
N24A
Package Diagram
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-011, 0.600 Wide
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-011, 0.600 Wide
Devices also available in Tape and Reel. Specify by appending suffix letter 鈥淴鈥?to the ordering code.
Connection Diagram
Top View
漏 2000 Fairchild Semiconductor Corporation
DS005994
www.fairchildsemi.com

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