10 k鈩?/div>
*2:
Free air
V
DSX
V
G1S
V
G2S
V
G1D
V
G2D
I
D
P
D
T
ch
T
stg
18
鹵8
*1
鹵8
*1
18
18
25
130
*2
125
鈥?5 to +125
V
V
V
V
V
mA
mW
擄C
擄C
0.60
0.65
PIN CONNECTIONS
1.
2.
3.
4.
Source
Drain
Gate2
Gate1
PRECAUTION:
Avoid high static voltages or electric fields so that this device would not suffer from any damage due to those voltage
or fields.
The information in this document is subject to change without notice. Before using this document, please confirm that
this is the latest version.
Not all devices/types available in every country. Please check with local NEC Compound Semiconductor Devices
representative for availability and additional information.
Document No. PU10033EJ01V0DS (1st edition)
(Previous No. P10585EJ2V0DS00)
Date Published October 2001 CP(K)
Printed in Japan
The mark
shows major revised points.
錚?/div>
NEC Corporation 1993
錚?/div>
NEC Compound Semiconductor Devices 2001
0 to 0.1
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