鈥?/div>
All-silicon, low-power CMOS
technology
TTL/CMOS compatible inputs and
outputs
Vapor phase, IR and wave
solderable
Auto-insertable (DIP pkg.)
Low ground bounce noise
Maximum data rate:
50 MBaud
data
3
廬
delay
devices,
inc.
PACKAGES
CLK
N/C
N/C
1
2
3
4
5
6
7
14
13
12
11
10
9
8
VDD
N/C
N/C
N/C
N/C
TXB
TX
CLK
RESB
DAT
GND
3D7501M
3D7501H
3D7501Z
1
2
3
4
8
7
6
5
VDD
N/C
TXB
TX
RESB
DAT
N/C
GND
DIP (.300)
Gull Wing (.300)
SOIC (.150)
3D7501 DIP (.300)
3D7501G Gull Wing (.300)
3D7501D SOIC (.150)
FUNCTIONAL DESCRIPTION
The 3D7501 is a monolithic CMOS Manchester Encoder. The clock
and data, present at the unit input, are combined into a single bi-
phase-level signal. In this encoding mode, a logic one is represented
by a high-to-low transition within the bit cell, while a logic zero is
represented by a low-to-high transition. The unit operating baud rate (in
Mbaud) is equal to the input clock frequency (in MHZ) . All pins
marked N/C must be left unconnected.
PIN DESCRIPTIONS
DAT
CLK
RESB
TX
TXB
VCC
GND
Data Input
Clock Input
Reset
Signal Output
Inverted Signal Output
+5 Volts
Ground
The all-CMOS 3D7501 integrated circuit has been designed as a reliable, economic alternative to hybrid
TTL Manchester Encoder. It is TTL- and CMOS-compatible, capable of driving ten 74LS-type loads. It is
offered in standard 8-pin and 14-pin auto-insertable DIPs and space saving surface mount 8-pin and 14-
pin SOICs.
Doc #96010
5/19/97
DATA DELAY DEVICES, INC.
3 Mt. Prospect Ave. Clifton, NJ 07013
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