鈥?/div>
PACKAGES
All-silicon, low-power 3.3V CMOS technology
1
VDD
IN
16
Vapor phase, IR and wave solderable
2
OUT
AE
15
Auto-insertable (DIP pkg.)
3
MD
SO/P0
14
Low ground bounce noise
IN
1
16
4
P7
P1
13
AE
2
15
Leading- and trailing-edge accuracy
SO/P0
3
14
5
P6
P2
12
Increment range:
0.25 through 7.5ns
P1
4
13
6
SC
P3
11
P2
5
12
Delay tolerance:
1% (See Table 1)
P3
6
11
7
P5
P4
10
P4
7
10
Temperature stability:
鹵3%
typical (0C-70C)
GND
8
9
Vdd stability:
鹵1%
typical (3.0V-3.6V)
8
SI
GND
9
3D3418S SOL
Static Idd:
1.3ma typical
3D3418 DIP
(300 Mil)
Minimum input pulse width:
10% of total
3D3418G Gull Wing
delay
Programmable via 3-wire serial or 8-bit parallel interface
For mechanical dimensions, click
here
.
VDD
OUT
MD
P7
P6
SC
P5
SI
FUNCTIONAL DESCRIPTION
The 3D3418 Programmable 8-Bit Silicon Delay Line product family
consists of 8-bit, user-programmable CMOS silicon integrated
circuits. Delay values, programmed either via the serial or parallel
interface, can be varied over 255 equal steps ranging from 250ps
to 7.5ns inclusively. Units have a typical inherent (address 0)
delay of 20ns (See Table 1). The input is reproduced at the output
without inversion, shifted in time as per user selection. The
3D3418 is CMOS-compatible, and features both rising- and
falling-edge accuracy.
PIN DESCRIPTIONS
IN
OUT
MD
AE
P0-P7
SC
SI
SO
VCC
GND
Signal Input
Signal Output
Mode Select
Address Enable
Parallel Data Input
Serial Clock
Serial Data Input
Serial Data Output
+3.3 Volts
Ground
The all-CMOS 3D3418 integrated circuit has been designed as a
reliable, economic alternative to hybrid TTL programmable delay lines. It is offered in a standard 16-pin
auto-insertable DIP and a space saving surface mount 16-pin SOIC.
TABLE 1: PART NUMBER SPECIFICATIONS
PART
NUMBER
3D3418-0.25
3D3418-0.5
3D3418-1
3D3418-2
3D3418-3
3D3418-4
3D3418-5
3D3418-7.5
DELAYS AND TOLERANCES
Step 0
Delay (ns)
19.5
鹵
3.0
19.5
鹵
3.0
19.5
鹵
3.0
20.0
鹵
3.5
20.0
鹵
3.5
20.0
鹵
3.5
20.0
鹵
3.5
20.5
鹵
3.5
Step 255
Delay (ns)
83.25
鹵
4.0
147.0
鹵
4.0
274.5
鹵
5.0
530.0
鹵
6.0
785.0
鹵
8.0
1040
鹵
9.0
1295
鹵
10
1933
鹵
15
Delay
Increment (ns)
0.25
鹵
0.15
0.50
鹵
0.25
1.00
鹵
0.50
2.00
鹵
1.00
3.00
鹵
1.50
4.00
鹵
2.00
5.00
鹵
2.50
7.50
鹵
3.75
Max Operating
Frequency
6.25 MHz
3.15 MHz
1.56 MHz
0.78 MHz
0.52 MHz
0.39 MHz
0.31 MHz
0.21 MHz
INPUT RESTRICTIONS
Absolute Max
Oper Freq
90 MHz
45 MHz
22 MHz
11 MHz
7.5 MHz
5.5 MHz
4.4 MHz
2.9 MHz
Min Operating
P.W.
80.0 ns
160.0 ns
320.0 ns
640.0 ns
960.0 ns
1280.0 ns
1600.0 ns
2400.0 ns
Absolute Min
Oper P.W.
5.5 ns
11.0 ns
22.0 ns
44.0 ns
66.0 ns
88.0 ns
110.0 ns
165.0 ns
NOTES: Any delay increment between 0.25 and 7.5 ns not shown is also available.
All delays referenced to input pin
餂?002
Data Delay Devices
Doc #02006
10/28/02
DATA DELAY DEVICES, INC.
3 Mt. Prospect Ave. Clifton, NJ 07013
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