5.0 MIN.
5.0 MIN.
current range.
鈥?/div>
Dual chips in one package can achieve high performance for
differential amplifiers and current mode logic (CML) circuits.
3
4
5.0 MIN.
1
5
PARAMETER
Collector to Base Voltage
Collector to Emitter Voltage
Emitter to Base Voltage
Collector Current
Total Power Dissipation
Thermal Resistance (junction to case)
Junction Temperature
Storage Temperature
SYMBOL
V
CBO
V
CEO
V
EBO
I
C
P
T
R
th (j-c)
T
j
T
stg
RATINGS
20
10
1.5
65/unit
240/unit
90/unit
200
-65 to +200
UNIT
V
V
V
mA
mW
擄C/W
擄C
擄C
(#492C)
PIN CONNECTIONS
2
3
C
2
C
1
4
B
1
E
5
1
B
2
ELECTRICAL CHARACTERISTICS (T
A
= 25
擄
C)
PARAMETER
Collector to Base Breakdown Voltage
Emitter to Base Breakdown Voltage
Collector to Emitter Breakdown Voltage
Collector Cut-off Current
Emitter Cut-off Current
DC Current Gain
h
FE
Ratio
Difference of Base to Emitter Voltage
Gain Bandwidth Product
Feedback Capacitance
SYMBOL
BV
CBO
BV
EBO
BV
CEO
I
CBO
I
EBO
h
FE
I
C
= 10
碌
A
I
E
= 10
碌
A, I
C
= 0
I
C
= 1 mA, R
BE
=
鈭?/div>
V
CB
= 10 V, I
E
= 0
V
EB
= 1 V, I
C
= 0
V
CE
= 8 V, I
C
= 20 mA
50
0.6
100
TEST CONDITIONS
MIN.
20
1.5
10
1.0
1.0
250
1.0
30
7
8
0.5
1.0
mV
GHz
pF
TYP.
MAX.
UNIT
V
V
V
碌
A
碌
A
h
FE1
/h
FE2
Note 1
V
CE
= 8 V, I
C
= 20 mA
鈭?/div>
V
BE
f
T
Note 2
C
re
Note 3
V
CE
= 8 V, I
C
= 20 mA
V
CE
= 8 V, I
C
= 20 mA
V
CB
= 10 V, I
E
= 0, f = 1.0 MHz
Notes 1.
h
FE1
is the smaller h
FE
value of the 2 transistors.
2.
Measured using a single-type device (equivalent to the 2SC3604).
3.
Measured with a 3-terminal bridge, terminals other than the collector and base of the device under test should be connected to
the guard terminal of the bridge.
Document No. P11698EJ1V0DS00 (1st edition)
Date Published July 1996 P
Printed in Japan
漏
2.0 MAX.
0.1
+0.06
-0.03
ABSOLUTE MAXIMUM RATINGS (T
A
= 25
擄
C)
0.6
鹵
0.1
1996
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