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2N7002K Datasheet

  • 2N7002K

  • N-Channel 60-V (D-S) MOSFET

  • 230.47KB

  • 3頁(yè)

  • VISHAY   VISHAY

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SPICE Device Model 2N7002K
Vishay Siliconix
N-Channel 60-V (D-S) MOSFET
CHARACTERISTICS
鈥?/div>
N-Channel Vertical DMOS
鈥?/div>
Macro Model (Subcircuit Model)
鈥?/div>
Level 3 MOS
鈥?/div>
Apply for both Linear and Switching Application
鈥?/div>
Accurate over the
鈭?5
to 125擄C Temperature Range
鈥?/div>
Model the Gate Charge, Transient, and Diode Reverse Recovery
Characteristics
DESCRIPTION
The attached spice model describes the typical electrical
characteristics of the n-channel vertical DMOS. The subcircuit
model is extracted and optimized over the
鈭?5
to 125擄C
temperature ranges under the pulsed 0-V to 10-V gate drive. The
saturated output impedance is best fit at the gate bias near the
threshold voltage.
A novel gate-to-drain feedback capacitance network is used to model
the gate charge characteristics while avoiding convergence difficulties
of the switched C
gd
model. All model parameter values are optimized
to provide a best fit to the measured electrical data and are not
intended as an exact physical interpretation of the device.
SUBCIRCUIT MODEL SCHEMATIC
This document is intended as a SPICE modeling guideline and does not constitute a commercial product data sheet. Designers should refer to the appropriate
data sheet of the same number for guaranteed specification limits.
Document Number: 73307
S-50261錚ev. A, 21-Feb-05
www.vishay.com
1

2N7002K 產(chǎn)品屬性

  • 3,000

  • 分離式半導(dǎo)體產(chǎn)品

  • FET - 單

  • -

  • MOSFET N 通道，金屬氧化物

  • 邏輯電平門

  • 60V

  • 300mA

  • 2 歐姆 @ 500mA，10V

  • 2.5V @ 250µA

  • -

  • 50pF @ 25V

  • 350mW

  • 表面貼裝

  • TO-236-3，SC-59，SOT-23-3

  • SOT-23

  • 帶卷 (TR)

  • 2N7002KTR

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