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2N7002E8/10K Datasheet

  • 2N7002E8/10K

  • TRANSISTOR | MOSFET | N-CHANNEL | 60V V(BR)DSS | 115MA I(D) ...

  • 5頁

  • ETC

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2N7002
DMOS Transistors (N-Channel)
TO-263AB (SOT-23)
.122 (3.1)
.110 (2.8)
.016 (0.4)
3
.056 (1.43
)
.052 (1.33
)
Top View
Pin Configuration
1.
Gate
2.
Source
3.
Drain
Mounting Pad Layout
0.037 (0.95)
0.037 (0.95)
1
2
max. .004 (0.1)
0.079 (2.0)
.007 (0.175)
.005 (0.125)
.037(0.95) .037(0.95)
0.035 (0.9)
.045 (1.15)
.037 (0.95)
0.031 (0.8)
.016 (0.4)
.016 (0.4)
.102 (2.6)
.094 (2.4)
Dimensions
in
in inches and (millimeters)
Dimensions inches and (millimeters)
Features
鈥?High input impedance
鈥?High-speed switching
鈥?No minority carrier storage time
鈥?CMOS logic compatible input
鈥?No thermal runaway
鈥?No secondary breakdown
Mechanical Data
Case:
SOT-23 Plastic Package
Weight:
approx. 0.008g
Packaging Codes/Options:
E8/10K per 13鈥?reel (8mm tape), 30K/box
E9/3K per 7鈥?reel (8mm tape), 30K/box
Maximum Ratings and Thermal Characteristics
(T
Parameter
Drain-Source Voltage
Drain-Gate Voltage
Gate-Source-Voltage (pulsed)
Drain Current (continuous)
Power Dissipation at T
C
= 50擄C
Thermal Resistance Junction to Substrate
Backside
Thermal Resistance Junction to Ambiant Air
Junction Temperature
Storage Temperature Range
Note:
(1) Ceramic Substrate 0.7mm; 2.5cm
2
area.
A
= 25擄C unless otherwise noted)
Symbol
V
DSS
V
DGS
V
GS
I
D
P
tot
R
螛SB
R
螛JA
T
j
T
S
Limit
60
60
鹵
20
Unit
V
V
V
mA
W
擄C/W
擄C/W
擄C
擄C
5/5/00
250
0.310
(1)
320
(1)
450
(1)
150
鈥?5 to +150

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