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2N6344_06 Datasheet

  • 2N6344_06

  • Triacs Silicon Bidirectional Thyristors

  • 6頁

  • ONSEMI

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2N6344
Preferred Device
Triacs
Silicon Bidirectional Thyristors
Designed primarily for full-wave ac control applications, such as
light dimmers, motor controls, heating controls and power supplies; or
wherever full鈭抴ave silicon gate controlled solid鈭抯tate devices are
needed. Triac type thyristors switch from a blocking to a conducting
state for either polarity of applied main terminal voltage with positive
or negative gate triggering.
Features
http://onsemi.com
鈥?/div>
Blocking Voltage to 800 V
鈥?/div>
All Diffused and Glass Passivated Junctions for Greater Parameter
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Uniformity and Stability
Small, Rugged, Thermowatt Construction for Low Thermal
Resistance, High Heat Dissipation and Durability
Gate Triggering Guaranteed in all Four Quadrants
For 400 Hz Operation, Consult Factory
Pb鈭扚ree Package is Available*
TRIACS
8 AMPERES RMS
600 thru 800 VOLTS
MT2
G
MT1
MARKING
DIAGRAM
MAXIMUM RATINGS
(T
J
= 25擄C unless otherwise noted)
Rating
鈥燩eak Repetitive Off鈭扴tate Voltage (Note 1)
(T
J
= 鈭?0 to +110擄C, Sine Wave
50 to 60 Hz, Gate Open)
2N6344
2N6349
鈥燨n鈭扴tate RMS Current (T
C
= +80擄C) Full
Cycle Sine Wave 50 to 60 Hz (T
C
= +90擄C)
鈥燩eak Non鈭扲epetitive Surge Current (One
Full Cycle, Sine Wave 60 Hz, T
C
= +25擄C)
Preceded and followed by rated current
Circuit Fusing Consideration (t = 8.3 ms)
鈥燩eak Gate Power
(T
C
= +80擄C, Pulse Width = 2
ms)
鈥燗verage Gate Power
(T
C
= +80擄C, t = 8.3 ms)
鈥燩eak Gate Current
(T
C
= +80擄C, Pulse Width = 2.0
ms)
鈥燩eak Gate Voltage
(T
C
= +80擄C, Pulse Width = 2.0
ms)
鈥燨perating Junction Temperature Range
Storage Temperature Range
Symbol
V
DRM,
V
RRM
600
800
I
T(RMS)
I
TSM
8.0
4.0
100
A
1
A
2
3
Value
Unit
V
TO鈭?20AB
CASE 221A
STYLE 4
2N6344G
AYWW
4
I
2
t
P
GM
P
G(AV)
I
GM
V
GM
T
J
T
stg
40
20
0.5
2.0
10
鈭?0 to +125
鈭?0 to +150
A
2
s
W
W
A
Y
WW
G
= Assembly Location
= Year
= Work Week
= Pb鈭扚ree Package
PIN ASSIGNMENT
A
V
擄C
擄C
1
2
3
4
Main Terminal 1
Main Terminal 2
Gate
Main Terminal 2
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
鈥營ndicates JEDEC Registered Data.
1. V
DRM
and V
RRM
for all types can be applied on a continuous basis. Blocking
voltages shall not be tested with a constant current source such that the
voltage ratings of the devices are exceeded.
*For additional information on our Pb鈭扚ree strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
Semiconductor Components Industries, LLC, 2006
ORDERING INFORMATION
Device
2N6344
2N6344G
Package
TO鈭?20AB
TO鈭?20AB
(Pb鈭扚ree)
Shipping
500 Units / Box
500 Units / Box
Preferred
devices are recommended choices for future use
and best overall value.
1
May, 2006 鈭?Rev. 4
Publication Order Number:
2N6344/D

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