鈥?/div>
T
C
= 110擄C
Low Holding Current 鈭?5 mA Maximum
Passivated Surface for Reliability and Uniformity
Device Marking: Device Type, e.g., 2N5060, Date Code
Pb鈭扚ree Packages are Available*
G
A
K
MARKING
DIAGRAM
2N
50xx
YWW
1
2
3
TO鈭?2
CASE 29
STYLE 10
50xx
Y
WW
Specific Device Code
= Year
= Work Week
PIN ASSIGNMENT
1
2
3
Cathode
Gate
Anode
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
Preferred
devices are recommended choices for future use
and best overall value.
*For additional information on our Pb鈭扚ree strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
漏
Semiconductor Components Industries, LLC, 2005
1
January, 2005 鈭?Rev. 7
Publication Order Number:
2N5060/D