鈥?/div>
Collector-Emitter Sustaining Voltage: V
CEO(sus)
= - 60 Vdc (Min)
DC Current Gain: h
FE
= 30-150 @ I
C
= 1.5 Adc
Low Collector-Emitter Saturation Voltage:
V
CE(sat)
=
-
0.75 Vdc @ I
C
= 1.5 Adc
High Current-Gain - Bandwidth Product: f
T
= 90 MHz (Typ)
Silicon PNP Power
Transistors
DESCRIPTION:
These power transistors are produced by PPC's DOUBLE DIFFUSED
PLANAR process. This technology produces high voltage devices
with excellent switching speeds, frequency response, gain linearity,
saturation voltages, high current gain, and safe operating areas.
They are intended for use in Commercial, Industrial, and Military
power switching, amplifier, and regulator applications.
Ultrasonically bonded leads and controlled die mount techniques are
utilized to further increase the SOA capability and inherent reliability
of these devices. The temperature range to 200
擄
C permits reliable
operation in high ambients, and the hermetically sealed package
insures maximum reliability and long life.
TO-5
ABSOLUTE MAXIMUM RATINGS:
RATINGS:
SYMBOL
V
CEO
*
V
CB
*
V
EB
*
I
C
*
I
C
*
I
B
*
T
STG
*
T
J
*
P
D
*
CHARACTERISTIC
Collector-Emitter Voltage
Collector-Base Voltage
Emitter-Base Voltage
Peak Collector Current
Continuous Collector Current
Base Current
Storage Temperature
Operating Junction Temperature
Total Device Dissipation
T
C
= 25
擄
C
Derate above 25
擄
C
Total Device Dissipation
T
A
= 25
擄
C
Derate above 25
擄
C
Thermal Resistance
Junction to Case
Junction to Ambient
VALUE
UNITS
Vdc
Vdc
Vdc
Adc
Adc
Adc
擄
C
擄
C
Watts
mW/
擄
C
Watts
mW/
擄
C
擄
C/W
擄
C/W
-
60
-
60
-
4.0
10
3.0
0.5
-65 to 200
-65 to 200
6.0
34.3
1.0
5.71
29
175
P
D
*
胃
JC
*
Indicates JEDEC registered data.
MSC1060.PDF 05-19-99
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