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29LV160BE Datasheet

  • 29LV160BE

  • 16M (2M X 8/1M X 16) BIT

  • 59頁

  • FUJITSU   FUJITSU

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FUJITSU SEMICONDUCTOR
DATA SHEET
DS05-20883-2E
FLASH MEMORY
CMOS
16M (2M
脳
8/1M
脳
16) BIT
MBM29LV160TE/BE
-
70/90/12
s
GENERAL DESCRIPTION
The MBM29LV160TE/BE is a 16M-bit, 3.0 V-only Flash memory organized as 2M bytes of 8 bits each or 1M words
of 16 bits each. The MBM29LV160TE/BE is offered in a 48-pin TSOP (I), 48-pin CSOP and 48-ball FBGA
packages. The device is designed to be programmed in-system with the standard system 3.0 V V
CC
supply. 12.0
V V
PP
and 5.0 V V
CC
are not required for write or erase operations. The device can also be reprogrammed in
standard EPROM programmers.
The standard MBM29LV160TE/BE offers access times of 70 ns, 90 ns and 120 ns, allowing operation of high-
speed microprocessors without wait states. To eliminate bus contention the device has separate chip enable (CE),
write enable (WE), and output enable (OE) controls.
The MBM29LV160TE/BE is pin and command set compatible with JEDEC standard E
2
PROMs. Commands are
written to the command register using standard microprocessor write timings. Register contents serve as input
to an internal state-machine which controls the erase and programming circuitry. Write cycles also internally latch
addresses and data needed for the programming and erase operations. Reading data out of the device is similar
to reading from 5.0 V and 12.0 V Flash or EPROM devices.
The MBM29LV160TE/BE is programmed by executing the program command sequence. This will invoke the
Embedded Program
TM*
Algorithm which is an internal algorithm that automatically times the program pulse widths
and verifies proper cell margins. Typically, each sector can be programmed and verified in about 0.5 seconds.
Erase is accomplished by executing the erase command sequence. This will invoke the Embedded Erase
TM*
Algorithm which is an internal algorithm that automatically preprograms the array if it is not already programmed
before executing the erase operation. During erase, the device automatically times the erase pulse widths and
verifies proper cell margins.
Any individual sector is typically erased and verified in 1.0 second. (If already preprogrammed.)
within a sector simultaneously via Fowler-Nordhiem tunneling. The bytes/words are programmed one byte/word
at a time using the EPROM programming mechanism of hot electron injection.
(Continued)
s
PRODUCT LINE UP
Part No.
V
CC
= 3.3 V
Ordering Part No.
V
CC
= 3.0 V
Max. Address Access Time (ns)
Max. CE Access Time (ns)
Max. OE Access Time (ns)
+0.3 V
鈥?.3 V
+0.6 V
鈥?.3 V
MBM29LV160TE/160BE
70
鈥?/div>
70
70
30
鈥?/div>
90
90
90
35
鈥?/div>
12
120
120
50

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