EPD Systems Engineering
Technical Bulletin
JTAG Boundary Scan Initialization on the AMD
29K Family
The Am29030鈩?and Am29035鈩?microprocessors and the Am29200鈩? Am29240鈩?
Am29245鈩?and Am29243鈩?microcontrollers incorporate a five-pin Joint Test Action
Group (JTAG) Boundary Scan Interface and Test Access Port that provides a scan
interface to testing and debug features of the processor core. Improper initialization of the
JTAG interface can cause intermittent and unpredictable behavior. This bulletin describes
design requirements for proper initialization of the interface on the 29K Family of
products, and supersedes the Technical Bulletin with PID#18010A.
The Test Access (JTAG) port can access, affect and sample the processor inputs and
outputs because a boundary scan register is incorporated into the design of the input and
output cells. For correct processor initialization in all cases, the
TRST
signal
must
be
asserted in conjunction with the
RESET
input, whether or not the JTAG port is used. What
follows is a recommended method for insuring that this occurs.
Tie
TRST
, the test reset input, to system RESET so that the JTAG logic is
initialized at power-on.
If the JTAG port is not to be used, drive
TCK
,
TMS
and
TDI
to known
states, preferably through pull-up resistors. Although these signals have
weak internal active pull-ups, tying them to a known signal level will
eliminate any system noise from being coupled into the JTAG interface.
For further information, contact the EPD Technical Support Hotline:
US:
1-800-2929-AMD
Europe: 44-(0) 256-811101
Japan: 0031-11-1163
29K, Am29200, Am29030, Am29035, Am29240, Am29245 and Am29243 are all trademarks of Advanced Micro Devices, Inc.
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PID# 18010B
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